Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..

"orange" wrote in message
...
Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..


Wrap some aluminium foil around a small piece of expanded polystyrene, then
you can just push the chips into the sandwich and keep the lot in a plastic
box. The foil shorts all the pins together so there can be no potential
difference between any.


Gareth.

gareth magennis wrote:

"orange" wrote in message

Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..

Wrap some aluminium foil around a small piece of expanded polystyrene, then
you can just push the chips into the sandwich and keep the lot in a plastic
box. The foil shorts all the pins together so there can be no potential
difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable charge
on a given pin, pushing it into aluminium foil will discharge it *quickly* and
the resulting current may kill it.

Always use high resistance material for storing ICs like the anyi-static black
foam material. This allows any charge to 'leak' away slowly and safely.

Graham

In article ,
Eeyore wrote:
Wrap some aluminium foil around a small piece of expanded polystyrene,
then you can just push the chips into the sandwich and keep the lot in
a plastic box. The foil shorts all the pins together so there can be
no potential difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable
charge on a given pin, pushing it into aluminium foil will discharge it
*quickly* and the resulting current may kill it.

I've just received some kits from Jaycar where they've used this very
method. I must admit to being surprised - everyone else seems to use the
correct foam.

--
*We are born naked, wet, and hungry. Then things get worse.

Dave Plowman London SW
To e-mail, change noise into sound.

"Dave Plowman (News)" wrote in message
...
In article ,
Eeyore wrote:
Wrap some aluminium foil around a small piece of expanded polystyrene,
then you can just push the chips into the sandwich and keep the lot in
a plastic box. The foil shorts all the pins together so there can be
no potential difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable
charge on a given pin, pushing it into aluminium foil will discharge it
*quickly* and the resulting current may kill it.

I've just received some kits from Jaycar where they've used this very
method. I must admit to being surprised - everyone else seems to use the
correct foam.



Are there any Data to show the actual risk involved using this method? I
accept that best practice is always best, but what do we know about the
reality of the situation?
Don't forget we are discussing the storage of small numbers of IC's in
somebodys workshop.



Gareth.

Eeyore wrote in
:



gareth magennis wrote:

"orange" wrote in message

Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..

Wrap some aluminium foil around a small piece of expanded polystyrene,
then you can just push the chips into the sandwich and keep the lot in
a plastic box. The foil shorts all the pins together so there can be
no potential difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable
charge on a given pin, pushing it into aluminium foil will discharge it
*quickly* and the resulting current may kill it.


It is NOT the current that kills CMOS, it is high VOLTAGE that punches
holes in the insulating layers inside the chip. [I am not aware of ANY chip
families where tiny CURRENTS would be a hazard].

As the conductors are quite small, it only requires a surplus/deficit of a
"few" electrons to build up a high voltage.

When the chip is in a circuit, there will be much higher currents charging
and discharging the

You want to avoid anything that may have accumulated a large surplus or
deficit of electrons.

As long as the aluminum foil is not at a high static voltage, the chances
of damage are quite small.

Hold the chip in one hand, the aluminum foil in the other and run your
finger along the leads before you bring the chip into contact with the
aluminum foil, if you want to 'slowly discharge' any charge that might have
built up.
(this assumes clean hands with normal skin resistance)
If you want to be ULTRA safe, make sure you touch the Vcc and Gnd pins
FIRST.




Always use high resistance material for storing ICs like the anyi-static
black foam material. This allows any charge to 'leak' away slowly and
safely.






--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

Eeyore writes:

gareth magennis wrote:

"orange" wrote in message

Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..

Wrap some aluminium foil around a small piece of expanded polystyrene, then
you can just push the chips into the sandwich and keep the lot in a plastic
box. The foil shorts all the pins together so there can be no potential
difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable charge
on a given pin, pushing it into aluminium foil will discharge it *quickly* and

And how would this occur?

the resulting current may kill it.

Always use high resistance material for storing ICs like the anyi-static black
foam material. This allows any charge to 'leak' away slowly and safely.

Aluminum foil is fine. The black stuff has a relatively low resistance
anyhow. Check it with an ohmmeter.

--- sam | Sci.Electronics.Repair FAQ: http://www.repairfaq.org/
Repair | Main Table of Contents: http://www.repairfaq.org/REPAIR/
+Lasers | Sam's Laser FAQ: http://www.repairfaq.org/sam/lasersam.htm
| Mirror Sites: http://www.repairfaq.org/REPAIR/F_mirror.html

Important: Anything sent to the email address in the message header above is
ignored unless my full name AND either lasers or electronics is included in the
subject line. Or, you can contact me via the Feedback Form in the FAQs.

Gareth Magennis wrote:

"Dave Plowman (News)" wrote
Eeyore wrote:

Wrap some aluminium foil around a small piece of expanded polystyrene,
then you can just push the chips into the sandwich and keep the lot in
a plastic box. The foil shorts all the pins together so there can be
no potential difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable
charge on a given pin, pushing it into aluminium foil will discharge it
*quickly* and the resulting current may kill it.

I've just received some kits from Jaycar where they've used this very
method. I must admit to being surprised - everyone else seems to use the
correct foam.

Are there any Data to show the actual risk involved using this method?

See manufacturers' advice.


I accept that best practice is always best, but what do we know about the
reality of the situation?
Don't forget we are discussing the storage of small numbers of IC's in
somebodys workshop.

A small sheet of conductive foam isn't expensive and I keep all the small
pieces that ICs come shipped in. These often fit small storage drawers very
nicely.

Graham

bz wrote:

Eeyore wrote

Aluminium foil is a BAD idea. In the event that there is any appreciable
charge on a given pin, pushing it into aluminium foil will discharge it
*quickly* and the resulting current may kill it.

It is NOT the current that kills CMOS, it is high VOLTAGE that punches
holes in the insulating layers inside the chip. [I am not aware of ANY chip
families where tiny CURRENTS would be a hazard].

These are two different things. Those 'tiny' currents can be quite large when
discharging a significant charge. Enought to damage the chip's internals
through overcurrent.

Graham

Sam Goldwasser wrote:

Eeyore writes:
gareth magennis wrote:
"orange" wrote in message

Is it safe to keep the CMOS chips (RAM) in plastic box?
if not, can it be modified to be safe somehow, I just don't have any
alternative..

Wrap some aluminium foil around a small piece of expanded polystyrene, then
you can just push the chips into the sandwich and keep the lot in a plastic
box. The foil shorts all the pins together so there can be no potential
difference between any.

Aluminium foil is a BAD idea. In the event that there is any appreciable charge
on a given pin, pushing it into aluminium foil will discharge it *quickly* and

And how would this occur?

Because the ali foil provides essentially a short circuit path.


the resulting current may kill it.

Always use high resistance material for storing ICs like the anyi-static black
foam material. This allows any charge to 'leak' away slowly and safely.

Aluminum foil is fine. The black stuff has a relatively low resistance
anyhow. Check it with an ohmmeter.

I have many times. You're plain wrong or using the wrong grade foam.

Graham

Eeyore wrote in
:



bz wrote:

Eeyore wrote

Aluminium foil is a BAD idea. In the event that there is any
appreciable charge on a given pin, pushing it into aluminium foil
will discharge it *quickly* and the resulting current may kill it.

It is NOT the current that kills CMOS, it is high VOLTAGE that punches
holes in the insulating layers inside the chip. [I am not aware of ANY
chip families where tiny CURRENTS would be a hazard].

These are two different things.

Yes.

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without having
a high voltage differential between the chip and the conductor! There are
not enough charge carriers to produce a high current from the small
internal capacitances of the cmos chip itself. If you have enough of a
differential between leads on the chip to cause a high current, then you
have already lost the chip due to the high voltage.

Enought to damage the chip's
internals through overcurrent.

NO! The danger to cmos from static electricity is not due to over-current,
it is due to high voltage differential between high impedance gates and
the base substrate of the cmos chip.

The voltage punches a hole in the insulating oxide layer.

TTL chips and the gated devices in ICs can be damaged by excess current
but that current is from a current source, not the kind of small static
charge that is developed when you carelessly handle a cmos chip.

The use of aluminum foil for storage of static sensitive components is
safe because there can not be an 'appreciable charge' on a given pin
without the device already having been destroyed by the voltage!

Do some calculations and see what kinds of voltage one would need to
produce enough coulombs of charge carriers to produce damage from
excessive current on any IC. Remember, you have only the volume of the
metal conductors involved to hold those charges.

Envision a capacitor, fully charged (the floating gate). Charge it to the
MAXIMUM voltage that it can stand. Now throw a DEAD SHORT across the leads
that feed that capacitor and look at the current flow as the cap
discharges.

Compare that current with the normal charge/discharge currents that flow
as pulses drive the gate when the IC is mounted and being used normally.
Look at the rise and fall times. Look at the conductor materials used on
the chip and connecting the chip to the lead. Find the weakest point along
the current path and compute the maximum peak current that can flow in
that conductor and for how long that current can flow before it causes
damage. [remember, current causes damage by heat.]

Now, check to see if the max permissible voltage could possibly produce
that current.

I think you will find that even chips that have built in weak conductors
['fuses' designed to be burned open by current flow] could not possibly be
damaged by the small charge allowable between any two pins of a CMOS
device.

Now, there MIGHT be some conditions where metal foil would NOT be a good
idea, like those where electrolysis could develop, but we are not
discussing those.

Another condition would be where there are high intensity ELECTRIC fields
nearby, STRONG Pulsed magnetic fields or RF fields nearby. [such as EMP]
But then the chip would be destroyed even if it were soldered into a
circuit.

I have worked with components that are VERY static sensitive (point
contact detector diodes used in radars) that were ALSO easy to damage with
excessive current.

We sometimes had RF fields around that could cause excessive current flow.
We kept the diodes wrapped in foil until we were installing them.

There are times when EM shielded rooms, anti-static mats and wrist straps
are not available. When they are not available, I work on a sheet of
aluminum foil and make sure I touch the foil and the component before the
component touches the foil.

--
bz

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

"Eeyore" wrote in message
...


Gareth Magennis wrote:

"Dave Plowman (News)" wrote
Eeyore wrote:

Wrap some aluminium foil around a small piece of expanded
polystyrene,
then you can just push the chips into the sandwich and keep the lot
in
a plastic box. The foil shorts all the pins together so there can
be
no potential difference between any.

Aluminium foil is a BAD idea. In the event that there is any
appreciable
charge on a given pin, pushing it into aluminium foil will discharge
it
*quickly* and the resulting current may kill it.

I've just received some kits from Jaycar where they've used this very
method. I must admit to being surprised - everyone else seems to use
the
correct foam.

Are there any Data to show the actual risk involved using this method?

See manufacturers' advice.


I accept that best practice is always best, but what do we know about
the
reality of the situation?
Don't forget we are discussing the storage of small numbers of IC's in
somebodys workshop.

A small sheet of conductive foam isn't expensive and I keep all the small
pieces that ICs come shipped in. These often fit small storage drawers
very
nicely.

Graham


I do the same as I get lots of it with chips that don't even need it. The
OP I presume doesn't have any. Anyway best practice is obviously to use the
right stuff, in the meantime the foil should provide a degree of protection
better than nothing. I don't think I will be recommending foil in the
future though!


Gareth.

In article ,
gareth magennis wrote:
I do the same as I get lots of it with chips that don't even need it.

Yes. It seems strange that all chips seem to be packaged in the same way.

I must admit to never having taken any precautions when fitting any chip -
but then I don't wear any artificial fabric clothes.

--
*If God dropped acid, would he see people?

Dave Plowman London SW
To e-mail, change noise into sound.

"Dave Plowman (News)" wrote in
:

In article ,
gareth magennis wrote:
I do the same as I get lots of it with chips that don't even need it.

Yes. It seems strange that all chips seem to be packaged in the same
way.

I must admit to never having taken any precautions when fitting any chip
- but then I don't wear any artificial fabric clothes.

Perhaps you live in an area where the relative humidity is rather high.
In which case, static electricity is seldom a problem.

If you lived in [for example] Wyoming, where RH is often in the low teens
or lower, THEN you would need to be careful. And more careful in the
winter [warming air dries it].






--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

"bz" wrote in message
98.139...
"Dave Plowman (News)" wrote in
:

In article ,
gareth magennis wrote:
I do the same as I get lots of it with chips that don't even need it.

Yes. It seems strange that all chips seem to be packaged in the same
way.

I must admit to never having taken any precautions when fitting any chip
- but then I don't wear any artificial fabric clothes.

Perhaps you live in an area where the relative humidity is rather high.
In which case, static electricity is seldom a problem.

If you lived in [for example] Wyoming, where RH is often in the low teens
or lower, THEN you would need to be careful. And more careful in the
winter [warming air dries it].





I always know when the humidity is low because then every time I get out of
my car I get a shock when I touch the bodywork. The static comes from
sliding myself off the seat on the way out. It only ever happens in warm
weather. Probably not a good idea to be holding any RAM chips or sensitive
Radar detectors during these times. Or a small animal.


Gareth.

Gareth Magennis wrote:

I always know when the humidity is low because then every time I get out of
my car I get a shock when I touch the bodywork. The static comes from
sliding myself off the seat on the way out. It only ever happens in warm
weather. Probably not a good idea to be holding any RAM chips or sensitive
Radar detectors during these times. Or a small animal.


You can damaged an IC at levels that won't generate a spark. OTOH,
'low humidity' in Central Florida is still over 50%.


--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

"Michael A. Terrell" wrote in
:

Gareth Magennis wrote:

I always know when the humidity is low because then every time I get
out of my car I get a shock when I touch the bodywork. The static
comes from sliding myself off the seat on the way out. It only ever
happens in warm weather. Probably not a good idea to be holding any
RAM chips or sensitive Radar detectors during these times. Or a small
animal.


You can damaged an IC at levels that won't generate a spark.

Yep.

OTOH,
'low humidity' in Central Florida is still over 50%.

Likewise here, in Baton Rouge, LA.




--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

bz wrote:

Eeyore wrote in

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without having
a high voltage differential between the chip and the conductor!

You can certainly have a charge that does not exceed the breakdown potential
of the IC oxide layer yet results in probably several AMPS of instantaneous
current when shorted into close to zero ohms through an aluminium foil sheet.

Why do you NITWITS feel the need to argue about the BLEEDING OBVIOUS ?

Graham

gareth magennis wrote:

I don't think I will be recommending foil in the future though!

I'm pleased to hear that.

Graham

"Dave Plowman (News)" wrote:

I must admit to never having taken any precautions when fitting any chip -
but then I don't wear any artificial fabric clothes.

The best advice around.

Only wear cotton and cotton mixes. Ensure a decent level of humidity.

THEN treat the floor with anti-static spay.

Graham

Gareth Magennis wrote:

I always know when the humidity is low because then every time I get out of
my car I get a shock when I touch the bodywork.

Many, many years ago I was working as an AV techician.

I was setting up a multi-screen projection rig in a premium Kensington, London
hotel. It was very new and had air-conditioning throughout. It also seemed to
have polyester carpets everywhere.

I was unable to get the kit to work since every time I plugged it into the
mains socket, it blew a 13A plugtop fuse (in the UK we have fuses in the mains
plugs).

In desperation, I called the office for backup. (They provided more fuses btw.
Every one of them blew.)

Simply pointing my finger at the telephone dial created a static discharge that
sent out a 'dial pulse'.

Needless to say, we informed the client that we could not proceed and
recommended a better (one with less static electricity) venue in the future.

Graham.

Eeyore wrote in
:



bz wrote:

Eeyore wrote in

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without
having a high voltage differential between the chip and the conductor!

You can certainly have a charge that does not exceed the breakdown
potential of the IC oxide layer yet results in probably several AMPS of
instantaneous current when shorted into close to zero ohms through an
aluminium foil sheet.

Why do you NITWITS feel the need to argue about the BLEEDING OBVIOUS ?

Why do you feel the need to insult someone that is trying to help you
understand something?

A half amp is .5 coul/sec. This represents about 3.121 x10^18 electrons.
A penny (1950 vintage) weighs about 3.1 gm and contains about 2.9 x 10^22
atoms.
There are clearly quite a few electrons in that penny, but NOT a huge excess
of electrons, normally.

Most chips have very small amounts of metal in them. Lets say the gate in
question holds 1 mg of metal.
(it is almost certainly MUCH less than that, but lets go with that for the
moment)
If it were copper, there would be about 9.3x10^18 atoms, so out of every
three atoms, we would need to have 1 excess electron in order to have a
charge of .5 coul.

The electric field is proportional to the charge and inversely proportional
to the square of the distance between the charge centers(the dielectric
thickness in this case)

A volt is a joule per coulomb.

For a parallel plate capacitor, V = q/C. so, what is the value of the
capacitor we have charged inside that chip?

Lets say it is 1 pf. To charge the cap with .5 coul of electrons what voltage
do we need?
My calculations show 5x10^11 volts. That seems a bit over any gate rating I
can imagine for any normal chips.

Even if the gate were 10 uF, a charge of half a coulomb would require 50 kV.

As I said before, current from charge on the chip is NOT a significant
factor.
VOLTAGE from charges on the chip ARE the hazard.

Do your own calculations and stop calling people names.



--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

On Fri, 23 May 2008 01:05:05 +0100, Eeyore
wrote:

....snip.....

Aluminium foil is a BAD idea. In the event that there is any appreciable charge
on a given pin, pushing it into aluminium foil will discharge it *quickly* and

And how would this occur?

Because the ali foil provides essentially a short circuit path.


the resulting current may kill it.

Always use high resistance material for storing ICs like the anyi-static black
foam material. This allows any charge to 'leak' away slowly and safely.

Aluminum foil is fine. The black stuff has a relatively low resistance
anyhow. Check it with an ohmmeter.


The safer practice nowadays is to use high resistance materials,
and NOT aluminum foil, or metal film covered plastics, or that black
conductive foam. The low resistance materials allow fast and high
charge/discharge currents that can vapourize small tracks or
microcircuitry. You should notice that a lot of packaging now uses
those pink bags, and if you check with an ohmmeter, they appear to
have an extremely high resistance. That allows voltages to dissipate
with low (less damaging) current.
The low resistance stuff is used to protect against external
electric fields. If you have both situations, then put the component
in a disipative bag (pink, high resistance), and then put that inside
a conductive pouch, say aluminum foil.
I'm told that you can effectively use the stuff that women commonly
use to control static on their dress clothes. It's a spray can, I
believe the active ingredient is sodium stearate (tallow?). It doesn't
last forever, but for weeks or months it's not bad. There are
commercial products that do a much better job, but you probably won't
find them at your supermarket. It provides a dissipative ilm, and will
not shield against electric fields.
Some of the little plastic boxes are quite evil when it comes to
voltage build up. You can flex one of those boxes, and easily build up
a charge of 200v-2Kv on the inside surface. That charge can induce a
a charge (and voltage) on a pin of a chip inside the box. I hade an
old analog voltmeter with a pastic face, I rubbed the face, and the
meter shifted about 10% because of the induced charge. One year later,
it was still off by 5%. By opening it up and breathing on the inside
plastic, I was able to eliminate the problem. I was really surprised
at how long that charge was held!
The statistics of ESD (Electro static discharge) suggest that the
probability is quite high that no apparent damage will show up right
away, but the component will be stressed, and will not live out its
normal design lifetime. ESD problems are one of the biggest cause of
poor reliability of microcircuitry.
Check this site: http://www.esda.org

-Paul

PlPaul wrote in
:

The safer practice nowadays is to use high resistance materials,
and NOT aluminum foil, or metal film covered plastics, or that black
conductive foam. The low resistance materials allow fast and high
charge/discharge currents that can vapourize small tracks or
microcircuitry.

Please show me where this is documented and what family of semi conductors
to which it applies.

My calculations show that the probability of
producing excessive current flow inside a CMOS chip by use of aluminum
foil,
without already having exceeded the voltage limits of the chip, is very
small.




--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

remove ch100-5 to avoid spam trap

bz wrote:

PlPaul wrote:

The safer practice nowadays is to use high resistance materials,
and NOT aluminum foil, or metal film covered plastics, or that black
conductive foam. The low resistance materials allow fast and high
charge/discharge currents that can vapourize small tracks or
microcircuitry.

Please show me where this is documented and what family of semi conductors
to which it applies.

It was well documented about 20-30 years ago. You're expected to KNOW this
stuff now.


My calculations show that the probability of
producing excessive current flow inside a CMOS chip by use of aluminum
foil, without already having exceeded the voltage limits of the chip, is
very
small.

And what calculations are those ?
Note : it has NOTHING to do with voltage.

Graham

bz wrote:

Eeyore wrote:
bz wrote:
Eeyore wrote in

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without
having a high voltage differential between the chip and the conductor!

You can certainly have a charge that does not exceed the breakdown
potential of the IC oxide layer yet results in probably several AMPS of
instantaneous current when shorted into close to zero ohms through an
aluminium foil sheet.

Why do you NITWITS feel the need to argue about the BLEEDING OBVIOUS ?

Why do you feel the need to insult someone that is trying to help you
understand something?

I'm never going to learn anything from a halfwit like YOU.


A half amp is .5 coul/sec. This represents about 3.121 x10^18 electrons.
A penny (1950 vintage) weighs about 3.1 gm and contains about 2.9 x 10^22
atoms.
There are clearly quite a few electrons in that penny, but NOT a huge excess
of electrons, normally.

You really are ****ING CLULESS.

Graham

bz wrote:

As I said before, current from charge on the chip is NOT a significant
factor.

It's the bloody DISCHARGE current through next to zero ohms that does the damage
you fathead.


VOLTAGE from charges on the chip ARE the hazard.

As well.


Do your own calculations and stop calling people names.

Stop talking ignorant DRIVEL and go learn something.

Ever wondered why tote bins for electronic parts are made of high resistivity
black plastic and not aluminium ?

Just about EVERYONE in this thread has corrected your insane ideas yet you still
presevere with them.

To create the anti-static effect, the black or silver bags are
***slightly***conductive
http://en.wikipedia.org/wiki/Antistatic_bag

It's important to discharge at a slow rate,
http://en.wikipedia.org/wiki/Antistatic_mat

The World's First Real ESD Safe Foam
Amazing Constant Surface Resistivity 10^6 – 10^7
http://exdron.com/e-p-foamd.htm

http://zotefoams.com/pages/EN/techinfosheets/TIS17.pdf

http://www.google.com/search?hl=en&r...ty&btnG=Search



Now go and take your IGNORANT ideas elsewhere.

Graham

Eeyore wrote in
:



bz wrote:

As I said before, current from charge on the chip is NOT a significant
factor.

It's the bloody DISCHARGE current through next to zero ohms that does
the damage you fathead.


VOLTAGE from charges on the chip ARE the hazard.

As well.


Do your own calculations and stop calling people names.

Stop talking ignorant DRIVEL and go learn something.

Ever wondered why tote bins for electronic parts are made of high
resistivity black plastic and not aluminium ?

Just about EVERYONE in this thread has corrected your insane ideas yet
you still presevere with them.

To create the anti-static effect, the black or silver bags are
***slightly***conductive
http://en.wikipedia.org/wiki/Antistatic_bag

Says NOTHING about high current being a hazard.


It's important to discharge at a slow rate,
http://en.wikipedia.org/wiki/Antistatic_mat

This is for a floor mat, used to discharge the static build up of someone
walking across a room.
It has NO bearing upon your claim that a high CURRENT can be discharged from
a chip causing damage to the chip
WITHOUT the chip having a high static voltage on it to start with.


The World's First Real ESD Safe Foam
Amazing Constant Surface Resistivity 10^6 – 10^7
http://exdron.com/e-p-foamd.htm

sales hype. No documentation claiming that high CURRENT is a hazard in the
absence of a high voltage charge.


http://zotefoams.com/pages/EN/techinfosheets/TIS17.pdf

This MIGHT have some bearing on your claims in that the resistance specs for
'anti static foam' have a range of values, but it gives no other support for
your claims.


http://www.google.com/search?hl=en&r...sipative+fo a
m+resistivity&btnG=Search

Useless google search. Show me something that supports your claim, don't send
me on a scavenger hunt.

Now go and take your IGNORANT ideas elsewhere.

I would rather learn than remain ignorant and spread apparently
'superstitious nonsense' as you appear to be doing.

I agree that for some things, such as shipping containers, conductive foam is
better.

But I see absolutely no reason for not wrapping a sheet of aluminum foil
around a chip to protect it [providing care is used in transferring the chip
to the foil], or wrapping foil around some non conductive foam and then
poking chips into the foam through the foil [again, taking care when picking
up the chip and bringing it into contact with the foil].

I think your idea about high current discharge is WRONG, because, as I have
tried to show you with a few calculations, there ain't enough electrons 'in
the chip' to damage the chip due to high current UNLESS the chip has a high
static charge on it already!

Since some chips can be damaged by voltages of 10 volts [ten!], the VOLTAGE
is the hazard, NOT the current.

[quote from esdfunds1print.pdf from
http://www.esda.org/esd_fundamentals.html]
Many electronic components are susceptible to ESD damage at relatively low
voltage levels. Many are susceptible at less than 100 volts and many disk
drive components have sensitivities below 10 volts.
[end quote]

There is quite a bit of interesting stuff on that web site but I see NOTHING
about 'high current discharge' damage due to shorting pins of a chip
together.

Again, I think that is pure nonsense.
If you can support it, I will gladly change my opinion.

If you call me names and curse at me, I will stop reading your posts.

I am only willing to spend my time talking with those that have enough SELF
RESPECT that they can afford to treat others with respect also.

--
bz 73 de N5BZ k

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

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"Eeyore" wrote in message
...


bz wrote:

Eeyore wrote:
bz wrote:
Eeyore wrote in

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without
having a high voltage differential between the chip and the conductor!

You can certainly have a charge that does not exceed the breakdown
potential of the IC oxide layer yet results in probably several AMPS of
instantaneous current when shorted into close to zero ohms through an
aluminium foil sheet.

Why do you NITWITS feel the need to argue about the BLEEDING OBVIOUS ?

Why do you feel the need to insult someone that is trying to help you
understand something?

I'm never going to learn anything from a halfwit like YOU.


A half amp is .5 coul/sec. This represents about 3.121 x10^18 electrons.
A penny (1950 vintage) weighs about 3.1 gm and contains about 2.9 x 10^22
atoms.
There are clearly quite a few electrons in that penny, but NOT a huge
excess
of electrons, normally.

You really are ****ING CLULESS.

Graham


Nice rational argument there Grahm. In my opininon you essentially
discredited everything you have said by resorting to name calling.

After reading everyone's argument, from what I can tell it seems Alunimum
should be fine for most circumstances. Even Sam says it's fine.

On Sun, 25 May 2008 14:54:17 +0000 (UTC), bz
wrote:


The safer practice nowadays is to use high resistance materials,
and NOT aluminum foil, or metal film covered plastics, or that black
conductive foam. The low resistance materials allow fast and high
charge/discharge currents that can vapourize small tracks or
microcircuitry.

Please show me where this is documented and what family of semi conductors
to which it applies.

My calculations show that the probability of
producing excessive current flow inside a CMOS chip by use of aluminum
foil,
without already having exceeded the voltage limits of the chip, is very
small.

First, there are a lot of differences between pink antistatic bags!
they vary a lot in terms of what they are meant for, some are just for
NON-ESD sensitive components, and many are meant as ESD dissipative
bags.


Read this page
http://www.polypluspackaging.co.uk/a...s-material.php
It discusses which kind of bags you should use for different
applications. Notice that the low resistance ones are used for
shielding (Faraday cage), and the pink ones (dissipative - hi R) are
used to transport semiconductors.

Quotation from www.esda.org :
Resistance or resistivity measurements help define the material's
ability to provide electrostatic shielding or charge dissipation.
Electrostatic shielding attenuates electrostatic fields on the surface
of a package in order to prevent a difference in electrical potential
from existing inside the package. Electrostatic shielding is provided
by materials that have a surface resistance equal to or less than 1.0
x 10^3 when tested according to EOS/ESD-S11.11 or a volume resistivity
of equal to or less than 1.0 x 10^3 ohm-cm when tested according to
the methods of EIA 541. In addition, shielding may be provided by
packaging materials that provide an air gap between the package and
the product. Dissipative materials provide charge dissipation
characteristics. These materials have a surface resistance greater
than 1.0 x 10^4 but less than or equal to 1.0 x 10^11 when tested
according to EOS/ESD-S11.11 or a volume resistivity greater than 1.0 x
10^5 ohm-cm but less than or equal to 1.0 x 10^12 ohm-cm when tested
according to the methods of EIA 541. ANSI/ESD 11.31 is used to
evaluate the shielding characteristics of bags.



quotation from : http://www.siliconfareast.com/esdcontrols4.htm
ESD-protective packaging materials must: 1) be dissipative; 2) exhibit
low triboelectric charging tendency; and 3) have the ability to shield
their contents from electrostatic fields. The insides of these
packaging materials have a low charging layer, while their outer
layers have a surface resistivity that's within the dissipative range.
Dissipative materials have a surface resistance greater than 10^4 but
less than or equal to 10^11 ohms when tested according to
EOS/ESD-S11.11 or a volume resistivity greater than 1.0 x 10^5 ohm-cm
but less than or equal to 1.0 x 10^12 ohm-cm when tested according to
the methods of EIA 541.

quotation from: http://www.esdjournal.com/techpapr/ryne/esdbags.htm
Q. During the past few months I have been trying to change our old
process of transporting our circuit boards around our factory from the
use of 'CONDUCTIVE BAGS' to the use of 'DISSAPATIVE BAGS'. I have been
unsuccessful due to the fact I cannot prove that this will benefit the
reliability of our products.
How can it be proven 'Practically' or 'Theoretically' to Justify the
extra costs incurred in the use of dissipative bags?
A. You have a good question. There is a white paper talking about
discharge times that may help. The more conductive an item is, the
greater the energy density in an ESD event. By slowing the charge
transfer (ESD event) down with a more resistive material
(dissipative), you can minimize the risks associated with conductive
ESD events. With a dissipative material, instead of an ESD event, you
will have a current ‘bleeding’ or charge balance that is better
controlled.


read he
http://www.staticcontrol.com/pdfs/p1...atic%20bag.pdf
this paper concerns itself most with events that are external to the
bag

read he http://www.esdjournal.com/techpapr/e...static/scp.htm
where the pink bags are at fault (because the ones used do not shield
against external events)

a typical product that does BOTH jobs, dissipative and shielding:
www.xsential.com/pdfDocs/mq1360mbb2001.pdf

papers:
White Paper - ESD Phenomena and Reliability for Microelectronics, ESD
Association, Oct., 2002

There are standards that discuss this and set requirements for
conductive (the kind of containers you're talking about) and
dissipative containers.
Site: http://www.esda.org
standards:
ANSI ESD S11.31-1994: Evaluating the Performance of Electrostatic
Discharge Shielding Bags, ESD
Association, Rome, NY 13440

ESD TR 20.20: ESD Handbook, ESD Association, Rome, NY 13440
http://www.esdsystems.com/whitepapers/wp_ESD-S20.html

although not quite relevant to the argument in this thread, you should
read this guy's experiences and his discovered gotcha's about ESD
products:
http://archive.evaluationengineering...es/1102esd.htm

-Paul

Paul wrote in
:

although not quite relevant to the argument in this thread, you should
read this guy's experiences and his discovered gotcha's about ESD
products:
http://archive.evaluationengineering...es/1102esd.htm

VERY interesting. I am glad I started with reading this one. Will read the
other references also and I thank you for them and the time you took to put
them together.

It has been some time (over 30 years) since I worked on a production line
and anti-static precautions were not taken. We made resistors and
capacitors.
It has been almost as long since I worked with radar and very ESD sensitive
diodes.
Since then, I have been lucky, I guess. In Baton Rouge, the high humidity
helps.
I have built some SMT devices recently, using ESD sensitive devices,
working on a foil covered bench and making sure everything was at the foils
potential.
No problems but from the info in the above reference, I can see some places
I could have run into problems if I did things differently.

Again, my thanks.




--
bz

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infinite set.

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bz wrote:

"Michael A. Terrell" wrote in
:

Gareth Magennis wrote:

I always know when the humidity is low because then every time I get
out of my car I get a shock when I touch the bodywork. The static
comes from sliding myself off the seat on the way out. It only ever
happens in warm weather. Probably not a good idea to be holding any
RAM chips or sensitive Radar detectors during these times. Or a small
animal.


You can damaged an IC at levels that won't generate a spark.

Yep.

OTOH,
'low humidity' in Central Florida is still over 50%.

Likewise here, in Baton Rouge, LA.


When humidity here is considered 'average', you can reach out and
squeeze water out of the air.


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bz wrote:

Eeyore wrote in
:



bz wrote:

Eeyore wrote

Aluminium foil is a BAD idea. In the event that there is any
appreciable charge on a given pin, pushing it into aluminium foil
will discharge it *quickly* and the resulting current may kill it.

It is NOT the current that kills CMOS, it is high VOLTAGE that punches
holes in the insulating layers inside the chip. [I am not aware of ANY
chip families where tiny CURRENTS would be a hazard].

These are two different things.

Yes.

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without having
a high voltage differential between the chip and the conductor! There are
not enough charge carriers to produce a high current from the small
internal capacitances of the cmos chip itself. If you have enough of a
differential between leads on the chip to cause a high current, then you
have already lost the chip due to the high voltage.

Enought to damage the chip's
internals through overcurrent.

NO! The danger to cmos from static electricity is not due to over-current,
it is due to high voltage differential between high impedance gates and
the base substrate of the cmos chip.

The voltage punches a hole in the insulating oxide layer.

TTL chips and the gated devices in ICs can be damaged by excess current
but that current is from a current source, not the kind of small static
charge that is developed when you carelessly handle a cmos chip.

The use of aluminum foil for storage of static sensitive components is
safe because there can not be an 'appreciable charge' on a given pin
without the device already having been destroyed by the voltage!

Do some calculations and see what kinds of voltage one would need to
produce enough coulombs of charge carriers to produce damage from
excessive current on any IC. Remember, you have only the volume of the
metal conductors involved to hold those charges.

Envision a capacitor, fully charged (the floating gate). Charge it to the
MAXIMUM voltage that it can stand. Now throw a DEAD SHORT across the leads
that feed that capacitor and look at the current flow as the cap
discharges.

Compare that current with the normal charge/discharge currents that flow
as pulses drive the gate when the IC is mounted and being used normally.
Look at the rise and fall times. Look at the conductor materials used on
the chip and connecting the chip to the lead. Find the weakest point along
the current path and compute the maximum peak current that can flow in
that conductor and for how long that current can flow before it causes
damage. [remember, current causes damage by heat.]

Now, check to see if the max permissible voltage could possibly produce
that current.

I think you will find that even chips that have built in weak conductors
['fuses' designed to be burned open by current flow] could not possibly be
damaged by the small charge allowable between any two pins of a CMOS
device.

Now, there MIGHT be some conditions where metal foil would NOT be a good
idea, like those where electrolysis could develop, but we are not
discussing those.

Another condition would be where there are high intensity ELECTRIC fields
nearby, STRONG Pulsed magnetic fields or RF fields nearby. [such as EMP]
But then the chip would be destroyed even if it were soldered into a
circuit.

I have worked with components that are VERY static sensitive (point
contact detector diodes used in radars) that were ALSO easy to damage with
excessive current.

We sometimes had RF fields around that could cause excessive current flow.
We kept the diodes wrapped in foil until we were installing them.

There are times when EM shielded rooms, anti-static mats and wrist straps
are not available. When they are not available, I work on a sheet of
aluminum foil and make sure I touch the foil and the component before the
component touches the foil.


Don't waste your time on the demented donkey. No matter what
position you start with, he has to be the devil's advocate and that the
other side. He's been doing this for years on the other
sci.electronics.* newsgroups, and he changes his screen name when too
many people kill file him. He is an America hating troll, and loves to
start fights.

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bz wrote:

I am only willing to spend my time talking with those that have enough SELF
RESPECT that they can afford to treat others with respect also.

You're an IGNORANT ****.

Graham

"Michael Kennedy" writes:

"Eeyore" wrote in message
...


bz wrote:

Eeyore wrote:
bz wrote:
Eeyore wrote in

Those 'tiny' currents can be quite large
when discharging a significant charge.

Yes, but you can not 'have a significant charge' on a chip without
having a high voltage differential between the chip and the conductor!

You can certainly have a charge that does not exceed the breakdown
potential of the IC oxide layer yet results in probably several AMPS of
instantaneous current when shorted into close to zero ohms through an
aluminium foil sheet.

Why do you NITWITS feel the need to argue about the BLEEDING OBVIOUS ?

Why do you feel the need to insult someone that is trying to help you
understand something?

I'm never going to learn anything from a halfwit like YOU.


A half amp is .5 coul/sec. This represents about 3.121 x10^18 electrons.
A penny (1950 vintage) weighs about 3.1 gm and contains about 2.9 x 10^22
atoms.
There are clearly quite a few electrons in that penny, but NOT a huge
excess
of electrons, normally.

You really are ****ING CLULESS.

Graham

Nice rational argument there Grahm. In my opininon you essentially
discredited everything you have said by resorting to name calling.

After reading everyone's argument, from what I can tell it seems Alunimum
should be fine for most circumstances. Even Sam says it's fine.

Does anyone remember manufacturers actually packaging CMOS chips in
in carriers with aluminum foam coated styrofoam? I wish I could find
some of those. Maybe before antistatic packaging was common.

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bz wrote:

Eeyore wrote

Just about EVERYONE in this thread has corrected your insane ideas yet
you still presevere with them.

To create the anti-static effect, the black or silver bags are
***slightly***conductive
http://en.wikipedia.org/wiki/Antistatic_bag

Says NOTHING about high current being a hazard.

So you mean you can't work out why the bags don't have low resisistivity ?

Just how ****ing thick are you ?

Graham

"Michael A. Terrell" wrote:

Don't waste your time on the demented donkey.

**** off Terrell, you worthless loser.


No matter what
position you start with, he has to be the devil's advocate and that the
other side. He's been doing this for years on the other
sci.electronics.* newsgroups, and he changes his screen name when too
many people kill file him.

Simply untrue.

Graham

bz wrote:

I have built some SMT devices recently, using ESD sensitive devices,
working on a foil covered bench and making sure everything was at the foils
potential.

A foil covered bench is a very bad idea.

Graham

Sam Goldwasser wrote:

Does anyone remember manufacturers actually packaging CMOS chips in
in carriers with aluminum foam coated styrofoam? I wish I could find
some of those. Maybe before antistatic packaging was common.


Yes, along with the early RCA 'A' series CosMos ICs. A lot of
overruns of early ICs showed up at the Dayton hamfest in original
packaging. I have a couple boxes of NEC MC-5800 RF-IF Hybrids that are
in cardboard shipping containers, with foil liners. I could dig one out
and take a few pictures if you'd like.

I bought some 'very' early 4016 ICs from James Electronics, (Later
renamed as Jameco) that were stacked and wrapped in several layers of
aluminum foil.

I've even seen aluminum rails that were formed like the anti-static
plastic tubes at Fair Radio in Lima Ohio 20+ years ago, but they wanted
over $1 each for a curiosity, so I tossed them back in their bin. I
doubt they were anywhere close to a buck new, and the price was way out
of line for that surplus store.


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Paul wrote in
:

First, there are a lot of differences between pink antistatic bags!
they vary a lot in terms of what they are meant for, some are just for
NON-ESD sensitive components, and many are meant as ESD dissipative
bags.


Read this page
http://www.polypluspackaging.co.uk/a...s-material.php
It discusses which kind of bags you should use for different
applications. Notice that the low resistance ones are used for
shielding (Faraday cage), and the pink ones (dissipative - hi R) are
used to transport semiconductors.


The best bags to use are apparently the moisture resistant ones that have
an anti static [moderate conductive layer to avoid attracting sparks], a
highly conductive layer [Faraday shielding and good anti EMP shielding],
another other anti static layer [again to avoid sparking] and are heat
sealable and moisture proof. Pink bags are almost useless as are black bags
as they do not protect the contents from high voltage impulses near the
bag.


Nothing in ANY document I have seen so far says anything about a hazard due
to shorting the leads of an IC TOGETHER.

There is mention of discharging an INDUCED charge, via a leg during some of
the testing. The charge being induced in the assembly equipment by the
motion of the chips through the storage and assembly equipment.

One of the surprising 'reminders' [I should have remembered it from
physics] is that simply separating two conductors physically can induce a
charge. In other words, picking up a chip that has been laying on a
conductor or an insulator and lifting it vertically away from that surface
can create an electrical potential between the two objects unless they both
are grounded to a common point.

Thanks again for the interesting references.




--
bz

please pardon my infinite ignorance, the set-of-things-I-do-not-know is an
infinite set.

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