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Paul[_12_] Paul[_12_] is offline
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Default CMOS DRAM chips and static

On Sun, 25 May 2008 14:54:17 +0000 (UTC), bz
wrote:


The safer practice nowadays is to use high resistance materials,
and NOT aluminum foil, or metal film covered plastics, or that black
conductive foam. The low resistance materials allow fast and high
charge/discharge currents that can vapourize small tracks or
microcircuitry.


Please show me where this is documented and what family of semi conductors
to which it applies.

My calculations show that the probability of
producing excessive current flow inside a CMOS chip by use of aluminum
foil,
without already having exceeded the voltage limits of the chip, is very
small.


First, there are a lot of differences between pink antistatic bags!
they vary a lot in terms of what they are meant for, some are just for
NON-ESD sensitive components, and many are meant as ESD dissipative
bags.


Read this page
http://www.polypluspackaging.co.uk/a...s-material.php
It discusses which kind of bags you should use for different
applications. Notice that the low resistance ones are used for
shielding (Faraday cage), and the pink ones (dissipative - hi R) are
used to transport semiconductors.

Quotation from www.esda.org :
Resistance or resistivity measurements help define the material's
ability to provide electrostatic shielding or charge dissipation.
Electrostatic shielding attenuates electrostatic fields on the surface
of a package in order to prevent a difference in electrical potential
from existing inside the package. Electrostatic shielding is provided
by materials that have a surface resistance equal to or less than 1.0
x 10^3 when tested according to EOS/ESD-S11.11 or a volume resistivity
of equal to or less than 1.0 x 10^3 ohm-cm when tested according to
the methods of EIA 541. In addition, shielding may be provided by
packaging materials that provide an air gap between the package and
the product. Dissipative materials provide charge dissipation
characteristics. These materials have a surface resistance greater
than 1.0 x 10^4 but less than or equal to 1.0 x 10^11 when tested
according to EOS/ESD-S11.11 or a volume resistivity greater than 1.0 x
10^5 ohm-cm but less than or equal to 1.0 x 10^12 ohm-cm when tested
according to the methods of EIA 541. ANSI/ESD 11.31 is used to
evaluate the shielding characteristics of bags.



quotation from : http://www.siliconfareast.com/esdcontrols4.htm
ESD-protective packaging materials must: 1) be dissipative; 2) exhibit
low triboelectric charging tendency; and 3) have the ability to shield
their contents from electrostatic fields. The insides of these
packaging materials have a low charging layer, while their outer
layers have a surface resistivity that's within the dissipative range.
Dissipative materials have a surface resistance greater than 10^4 but
less than or equal to 10^11 ohms when tested according to
EOS/ESD-S11.11 or a volume resistivity greater than 1.0 x 10^5 ohm-cm
but less than or equal to 1.0 x 10^12 ohm-cm when tested according to
the methods of EIA 541.

quotation from: http://www.esdjournal.com/techpapr/ryne/esdbags.htm
Q. During the past few months I have been trying to change our old
process of transporting our circuit boards around our factory from the
use of 'CONDUCTIVE BAGS' to the use of 'DISSAPATIVE BAGS'. I have been
unsuccessful due to the fact I cannot prove that this will benefit the
reliability of our products.
How can it be proven 'Practically' or 'Theoretically' to Justify the
extra costs incurred in the use of dissipative bags?
A. You have a good question. There is a white paper talking about
discharge times that may help. The more conductive an item is, the
greater the energy density in an ESD event. By slowing the charge
transfer (ESD event) down with a more resistive material
(dissipative), you can minimize the risks associated with conductive
ESD events. With a dissipative material, instead of an ESD event, you
will have a current ‘bleeding’ or charge balance that is better
controlled.


read he
http://www.staticcontrol.com/pdfs/p1...atic%20bag.pdf
this paper concerns itself most with events that are external to the
bag

read he http://www.esdjournal.com/techpapr/e...static/scp.htm
where the pink bags are at fault (because the ones used do not shield
against external events)

a typical product that does BOTH jobs, dissipative and shielding:
www.xsential.com/pdfDocs/mq1360mbb2001.pdf

papers:
White Paper - ESD Phenomena and Reliability for Microelectronics, ESD
Association, Oct., 2002

There are standards that discuss this and set requirements for
conductive (the kind of containers you're talking about) and
dissipative containers.
Site: http://www.esda.org
standards:
ANSI ESD S11.31-1994: Evaluating the Performance of Electrostatic
Discharge Shielding Bags, ESD
Association, Rome, NY 13440

ESD TR 20.20: ESD Handbook, ESD Association, Rome, NY 13440
http://www.esdsystems.com/whitepapers/wp_ESD-S20.html

although not quite relevant to the argument in this thread, you should
read this guy's experiences and his discovered gotcha's about ESD
products:
http://archive.evaluationengineering...es/1102esd.htm

-Paul