These are some 'scope shots of a slightly misbehaving buck converter whereby
the duty cycle of the switch jitters around a bit when the input voltage is
~3V but doesn't do so at somewhat lower and higher voltages. (Output voltage
is 1.2V and maximum intended output current is around 150mA; the scope shots
were taken with a 20 ohm -- 60mA -- load connected. J6 and J7 are unjumpered
and R3 and C1 really are DNIed.)

I'm all ears for suggestions on how to improve this design, both the schematic
part and the layout. The layout is done with the idea that the four clustered
vias are the honest-to-God "ground" reference and that the controller's ground
and passive components' grounds don't see switching currents as much as
possible.

Things I've tried that didn't have a significant effect on the jitter:

-- Dropping 100nF from pin 5 to ground.
-- Increasing C3, up to at least 1nF. Actually, the design doesn't even seem
to need C3 -- I'm thinking it's there to improve the high-frequency response
of the regulator? Linear's datasheet uses a 20pF cap (with a resistor ~5x
larger) in all their examples.
-- Dropping 100nF from the R4/R5 junction to ground.
-- Changed both the input and output capacitors (C4/C5) to 10uF ceramics.
-- Raised C2 up to at least 1nF, which seriously cuts the loop bandwidth.
From doing some load step tests, down to about 2.8V the system is pretty
nicely damped and remains so at higher voltages; below 2.8V you do start to
see a handful of recovery cycles in the step response, but everything remains
stable. Dropping C2 to 100pF will make the loop unstable at voltage under
~3V.
-- Varied L1 anywhere from ~7.5uH to ~30uH. The size used -- 15uH -- is
larger than typically used, but was chosen based on staying in continuous
conduction mode down to a 20mA load with a 4.2V input.

I very much appreciate the time that people spend looking at stuff like this
on Usenet and thank you all for doing so!

---Joel

Joel Koltner wrote:
(snip)
I'm all ears for suggestions on how to improve this design, both the schematic
part and the layout. The layout is done with the idea that the four clustered
vias are the honest-to-God "ground" reference and that the controller's ground
and passive components' grounds don't see switching currents as much as
possible.
(snip)

Layout:

The trace necks down very thin at U1, pin 6. Why?

Must there be clear space under the chip? If not, why not
broaden Vbat and Gnd under it to reduce the inductance back
to C4?

Opposite comment for U1 pin 5 to L1. This node should have
the absolute lowest capacitance to everything, so the pad
sizes should be just what is needed for soldering and the
trance width just what the current needs. No square corners
if a diagonal will do.

I would try to add a small ceramic chip cap to ground
between L1 and everything else connected to the Vout node,
with the smallest loop area back to the ground side of C4
and U1 pin 4. That ground return path can be a separate
trace from the ground fill, to keep that high frequency
current through L1's parallel capacitance out of the ground
system.




--
Regards,

John Popelish

John Popelish wrote:

Could you squeeze a 0.1 uF ceramic cap between U1 and L1,
C5, connected between ground and VBat?

--
Regards,

John Popelish

On Thu, 31 Jan 2008 18:53:26 -0800, "Joel Koltner"
wrote:


I'd try flipping C2 around to contact the ground at C4, to see if
there's a difference.

RL

On Thu, 31 Jan 2008 18:53:26 -0800, "Joel Koltner"
wrote:

These are some 'scope shots of a slightly misbehaving buck converter whereby
the duty cycle of the switch jitters around a bit when the input voltage is
~3V but doesn't do so at somewhat lower and higher voltages. (Output voltage
is 1.2V and maximum intended output current is around 150mA; the scope shots
were taken with a 20 ohm -- 60mA -- load connected. J6 and J7 are unjumpered
and R3 and C1 really are DNIed.)

I'm all ears for suggestions on how to improve this design, both the schematic
part and the layout. The layout is done with the idea that the four clustered
vias are the honest-to-God "ground" reference and that the controller's ground
and passive components' grounds don't see switching currents as much as
possible.

Things I've tried that didn't have a significant effect on the jitter:

-- Dropping 100nF from pin 5 to ground.
-- Increasing C3, up to at least 1nF. Actually, the design doesn't even seem
to need C3 -- I'm thinking it's there to improve the high-frequency response
of the regulator? Linear's datasheet uses a 20pF cap (with a resistor ~5x
larger) in all their examples.
-- Dropping 100nF from the R4/R5 junction to ground.
-- Changed both the input and output capacitors (C4/C5) to 10uF ceramics.
-- Raised C2 up to at least 1nF, which seriously cuts the loop bandwidth.
From doing some load step tests, down to about 2.8V the system is pretty
nicely damped and remains so at higher voltages; below 2.8V you do start to
see a handful of recovery cycles in the step response, but everything remains
stable. Dropping C2 to 100pF will make the loop unstable at voltage under
~3V.
-- Varied L1 anywhere from ~7.5uH to ~30uH. The size used -- 15uH -- is
larger than typically used, but was chosen based on staying in continuous
conduction mode down to a 20mA load with a 4.2V input.

I very much appreciate the time that people spend looking at stuff like this
on Usenet and thank you all for doing so!

---Joel

One potential layout problem is where you connect the grounds from C2,
R3, & R5. They should attach to pin-4, not the ground terminal. See
the attachment. I put the mod in cyan. This sort of thing can cause
instability if there is enough spikey current coming through the
inductor. As an experiment, you can cut this trace and attach a wire
to pin-4 and the gnd side of R3. It's worth a try if you can't find
anything else.

You have two vias inbetween L1 and C5. They shouldn't be there and you
can pick off that voltage from your Vout terminal on the bottom right.

Can you get rid of the alignment holes for J5? They take up lots of
area under U1 that could be used for beefing up the pwr and gnd
traces. However, I doubt that beefing up those traces would do
anything to cure your problem.

Your output capacitor is pretty big. What's the impedance of C5 at
1.4MHz? You may need something smaller like a 4.7 or 10uF ceramic in
addition to your 150uF beast. For such a low current supply, you can
probably get by with 10uF to 33uF.

BTW, X7R ceramic caps are fine to use. The capacitance reduces as you
apply voltage. You can look this up in an AVX catalog. X5R is OK too.
Don't use the super high-k caps as they significantly change value
with applied voltage and reduce capacitance over time.

You may want to use an R/C combo for your loop compensation (R3 & C1).
Use a trimpot for R3 while experimenting.

---
Mark

Joel Koltner wrote:
These are some 'scope shots of a slightly misbehaving buck converter whereby
the duty cycle of the switch jitters around a bit when the input voltage is
~3V but doesn't do so at somewhat lower and higher voltages. (Output voltage
is 1.2V and maximum intended output current is around 150mA; the scope shots
were taken with a 20 ohm -- 60mA -- load connected. J6 and J7 are unjumpered
and R3 and C1 really are DNIed.)

I'm all ears for suggestions on how to improve this design, both the schematic
part and the layout. The layout is done with the idea that the four clustered
vias are the honest-to-God "ground" reference and that the controller's ground
and passive components' grounds don't see switching currents as much as
possible.


God fixes a lot of things but AFAICT not ground structures :-)

I am not a fan of clustered grounds but tend to use full ground planes
instead. Clever placement to avoid heavy currents from running right
across the chip area is still necessary but I think you did a pretty
good job there.


Things I've tried that didn't have a significant effect on the jitter:

-- Dropping 100nF from pin 5 to ground.


It would need a low ESR small cap there. I'd never run a switcher
without some kind of ceramic cap at the output.


-- Increasing C3, up to at least 1nF. Actually, the design doesn't even seem
to need C3 -- I'm thinking it's there to improve the high-frequency response
of the regulator? Linear's datasheet uses a 20pF cap (with a resistor ~5x
larger) in all their examples.


Even 100pF seems a bit high.


-- Dropping 100nF from the R4/R5 junction to ground.


That can make it go ballistic ;-)


-- Changed both the input and output capacitors (C4/C5) to 10uF ceramics.


Good idea. It also needs something ceramic to "lean on" for the input.


-- Raised C2 up to at least 1nF, which seriously cuts the loop bandwidth.
From doing some load step tests, down to about 2.8V the system is pretty
nicely damped and remains so at higher voltages; below 2.8V you do start to
see a handful of recovery cycles in the step response, but everything remains
stable. Dropping C2 to 100pF will make the loop unstable at voltage under
~3V.
-- Varied L1 anywhere from ~7.5uH to ~30uH. The size used -- 15uH -- is
larger than typically used, but was chosen based on staying in continuous
conduction mode down to a 20mA load with a 4.2V input.

I very much appreciate the time that people spend looking at stuff like this
on Usenet and thank you all for doing so!


A few comments:

R2 is high. If the worst case leakage of 1uA happens that would put you
above the min threshold.

You need a full ground plane. For example, the ground trace to R2
tunnels right through the "hot zone" underneath the inductor. As Mark
suggested run a big fat wire from the ground at R5 to pin 4 and another
from C2 to pin 4. Cut the ground trace to R2 off right at that resistor
and run a fat wire to pin 4. It'll be messy but this gets you as close
to a good ground as possible without a relayout.

Check the source. Does it become soft at the point where jitter starts?

I am sure you did this but just in case: Make sure your digital scope
definitely does not go into equivalent time sampling. Or just use a real
scope like a Tek 2465.

--
Regards, Joerg

http://www.analogconsultants.com/

What is the issue here? would have to see a complete schematic of the
circuit and the values of precision for the components. Note that I have
been out of that portion of the electronics business for years but use to
really good at this stuff.
Note for the decoupling to ground was add a capacitor, he might want to add
a resistor (fairly high value to help build the charge on the cap and a
bypass if it gets to "hot"). That is why it is called an R/C decoupling
circuit.



"Joel Koltner" wrote in message
...
These are some 'scope shots of a slightly misbehaving buck converter
whereby the duty cycle of the switch jitters around a bit when the input
voltage is ~3V but doesn't do so at somewhat lower and higher voltages.
(Output voltage is 1.2V and maximum intended output current is around
150mA; the scope shots were taken with a 20 ohm -- 60mA -- load connected.
J6 and J7 are unjumpered and R3 and C1 really are DNIed.)

I'm all ears for suggestions on how to improve this design, both the
schematic part and the layout. The layout is done with the idea that the
four clustered vias are the honest-to-God "ground" reference and that the
controller's ground and passive components' grounds don't see switching
currents as much as possible.

Things I've tried that didn't have a significant effect on the jitter:

-- Dropping 100nF from pin 5 to ground.
-- Increasing C3, up to at least 1nF. Actually, the design doesn't even
seem to need C3 -- I'm thinking it's there to improve the high-frequency
response of the regulator? Linear's datasheet uses a 20pF cap (with a
resistor ~5x larger) in all their examples.
-- Dropping 100nF from the R4/R5 junction to ground.
-- Changed both the input and output capacitors (C4/C5) to 10uF ceramics.
-- Raised C2 up to at least 1nF, which seriously cuts the loop bandwidth.
From doing some load step tests, down to about 2.8V the system is pretty
nicely damped and remains so at higher voltages; below 2.8V you do start
to see a handful of recovery cycles in the step response, but everything
remains stable. Dropping C2 to 100pF will make the loop unstable at
voltage under ~3V.
-- Varied L1 anywhere from ~7.5uH to ~30uH. The size used -- 15uH -- is
larger than typically used, but was chosen based on staying in continuous
conduction mode down to a 20mA load with a 4.2V input.

I very much appreciate the time that people spend looking at stuff like
this on Usenet and thank you all for doing so!

---Joel

Hi John,

For some odd reason my Usenet provider (Forte) apparently reset the list
indices so nothing "new" showed up until I went and removed and re-added the
news server. In the interim (Friday, really) I did some more testing but
hadn't been able to respond here until now.

"John Popelish" wrote in message
. ..
The trace necks down very thin at U1, pin 6. Why?

An oversight on my part; fixed.

Must there be clear space under the chip?

In the version of the board you're looking at, yes - there are two alignment
holes for the connector on the back. I've since ordered a different
connector without alignment holes, so I can broaden those traces as you
suggest.

Opposite comment for U1 pin 5 to L1. This node should have the absolute
lowest capacitance to everything, so the pad sizes should be just what is
needed for soldering and the trance width just what the current needs.

Thanks, I'll change that.

I would try to add a small ceramic chip cap to ground between L1 and
everything else connected to the Vout node, with the smallest loop area
back to the ground side of C4 and U1 pin 4.

I tried this and it didn't have any noticeable effect.

I appreciate the help; thanks for your input, John.

---Joel

"John Popelish" wrote in message
. ..
Could you squeeze a 0.1 uF ceramic cap between U1 and L1, C5, connected
between ground and VBat?

I soldered an 0603 100nF cap onto pin 6 of U1 (Vbat) and then ran a 30ga.
wirewrap wire over to pin 4 (Gnd). It didn't make a noticeable change,
although I'm not 100% certain this is what you were suggesting.

---Joel

"legg" wrote in message
...
I'd try flipping C2 around to contact the ground at C4, to see if
there's a difference.

It makes the switcher go unstable. :-) Having already read some future
responses, though, I'm thinking that I then also want to cut the connection
going from the grounds on C2/R3/R5 back to the labeled ground test
point/via.

---Joel

Hi Mark,

"qrk" wrote in message
...
One potential layout problem is where you connect the grounds from C2,
R3, & R5. They should attach to pin-4, not the ground terminal. See
the attachment. I put the mod in cyan.

Cool, I'll try that tomorrow morning.

You have two vias inbetween L1 and C5. They shouldn't be there and you
can pick off that voltage from your Vout terminal on the bottom right.

The idea there was to give the "real" output (which is off of the connector
on the bottom; what's labeled as "Vout" in the lower right of the PCB is
just a test point, really) a slightly lower impedance (smaller loop area)
back to the anode of C5. I suppose I could drill out those vias and use a
bit of copper tape on the bottom to test your idea here though?

Can you get rid of the alignment holes for J5?

Yes, done.

Your output capacitor is pretty big. What's the impedance of C5 at
1.4MHz?

18 milliohms, give or take. The input and output capacitors are Panasonic
speciality polymer (SP) capacitors, which have incredibly good performance
for their size. DigiKey has a training module on them he
http://dkc1.digikey.com/us/en/PTM/10_SPCaps.html. They're not *quite* as
good as ceramics in the ESR department, but they're generally smaller (at
least for the same capacitance) and noticeably cheaper than cermaics.

As others have suggested, though, and due to having to shrink the board
some, I have changed to 10uF ceramics. Or at least I will once those parts
arrive in a few days.

You may want to use an R/C combo for your loop compensation (R3 & C1).
Use a trimpot for R3 while experimenting.

If I have some time I'll try that. Is there any benefit to an R/C
combination (the R just provides a zero, right?) other than faster transient
response (i.e., recovery from a load step)?

Thank you for your suggestions, Mark.

---Joel

Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm enough
that much of it is already melted.

"Joerg" wrote in message
...
God fixes a lot of things but AFAICT not ground structures :-)

No harm in asking for his inspiration, though. :-)

I am not a fan of clustered grounds but tend to use full ground planes
instead.

Given your frugality I'm actually a little surprised by this statement! Not
a year ago I attended a National Semiconductor "road show" on their latest
switcher ICs and they made a big deal about layout starting with the premise
that, "we want to show you layouts that actually work on the 2 layer PCB
you're most likely going to be forced to use for cost reasons..."

Anyway, the "real" circuit this power supply goes into will be a four layer
PCB, so not to worry. I know you're a proponent of *not* cutting up the
ground planes, but that doesn't imply that you'd just drop a via anywhere
you needed "ground" rather than, say, routing the ends of R1/C2/R3/R5 back
to pin 4 of U1 first, does it?

It would need a low ESR small cap there. I'd never run a switcher without
some kind of ceramic cap at the output.

You're including the Panasonic "speciality polymer" caps I used in that
statement, right?

(regarding C3)
Even 100pF seems a bit high.

Do you have any advice on how you choose such a cap in general? Are you
aiming for a particularly corner frequency or...?

That can make it go ballistic ;-)

Yeah, thinking about it that does seem to be more along the lines of how I'd
build an oscillator...

R2 is high. If the worst case leakage of 1uA happens that would put you
above the min threshold.

Good catch, I'll change that.

You need a full ground plane. For example, the ground trace to R2 tunnels
right through the "hot zone" underneath the inductor. As Mark suggested
run a big fat wire from the ground at R5 to pin 4 and another from C2 to
pin 4. Cut the ground trace to R2 off right at that resistor and run a fat
wire to pin 4. It'll be messy but this gets you as close to a good ground
as possible without a relayout.

I have no qualms about messy. :-) I'll try out those modifications tomorrow
and let you know what happens.

Check the source. Does it become soft at the point where jitter starts?

I'll check it.

I am sure you did this but just in case: Make sure your digital scope
definitely does not go into equivalent time sampling. Or just use a real
scope like a Tek 2465.

The scope shots are from an Agilent MSO 6000 which I don't think even has
the option to do equivalent time sampling (it's 1GHz frequency response,
4GSps)... but I'll fire up the 2465 to verify that it's not lying to me.

As usual, thanks for the help. Stay warm tonight!

---Joel

"capt_kirk_a" wrote in message
...
What is the issue here?

The issue is there's significant jitter on the gate drive of the switch at
certain input voltages. There's a post over on sci.electronics.design that
started the discussion... here's Google's copy:
http://groups.google.com/group/sci.e...47838ca2f75f1e

would have to see a complete schematic of the circuit and the values of
precision for the components.

They're in the PDF files; let me know if I omitted anything.

---Joel

On Sun, 3 Feb 2008 20:03:22 -0800, "Joel Koltner"
wrote:

"legg" wrote in message
.. .
I'd try flipping C2 around to contact the ground at C4, to see if
there's a difference.

It makes the switcher go unstable. :-) Having already read some future
responses, though, I'm thinking that I then also want to cut the connection
going from the grounds on C2/R3/R5 back to the labeled ground test
point/via.

That would be the logical next step, given the results of the
iteration.

RL

Joel Koltner wrote:
Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm enough
that much of it is already melted.


I almost slid down the driveway on my behind this morning :-(

No idea what all those greenies mean with global warming. It sure ain't
happening around here.


"Joerg" wrote in message
...
God fixes a lot of things but AFAICT not ground structures :-)

No harm in asking for his inspiration, though. :-)


Sure, you can ask Him anything. Whether stability is going to be granted
for your design is another matter :-)


I am not a fan of clustered grounds but tend to use full ground planes
instead.

Given your frugality I'm actually a little surprised by this statement! Not
a year ago I attended a National Semiconductor "road show" on their latest
switcher ICs and they made a big deal about layout starting with the premise
that, "we want to show you layouts that actually work on the 2 layer PCB
you're most likely going to be forced to use for cost reasons..."


Sure, some of my designs go the same route and often end up on phenolic.
There I use ground pours and connect them where needed. Making a
switcher work without a ground plane is an art but possible. And by
"work" I mean including passing the EMC test.


Anyway, the "real" circuit this power supply goes into will be a four layer
PCB, so not to worry. I know you're a proponent of *not* cutting up the
ground planes, but that doesn't imply that you'd just drop a via anywhere
you needed "ground" rather than, say, routing the ends of R1/C2/R3/R5 back
to pin 4 of U1 first, does it?


When I have the luxury of a 4-layer I usually drop vias where needed. No
routing ground traces back and stuff. The main reason is that any RF
field that finds its way to that area will cause a home run trace to
pick up some of the field. A good ground plane behaves much better.


It would need a low ESR small cap there. I'd never run a switcher without
some kind of ceramic cap at the output.

You're including the Panasonic "speciality polymer" caps I used in that
statement, right?


Ok, specialty caps can work. But we all know how it goes later. Someone
from purchasing finds a much more "economical" part, a rep sweet-talks
them into it, you are on vacation and someone signs the ECO ... poof. I
try to make sure it all works with jelly-bean parts wherever possible.
The extra cost of a specialty cap can often be more than offset by
specifying a cheaper one plus a ceramic cap. It all depends on where
it's produced. Clients who insist on assembly in high-wage countries
must often eat placement costs of several cents per part and that
requires a whole different design strategy.


(regarding C3)
Even 100pF seems a bit high.

Do you have any advice on how you choose such a cap in general? Are you
aiming for a particularly corner frequency or...?


I never use such caps at all. Then again, I rarely use integrated
switchers that are single-sourced.


That can make it go ballistic ;-)

Yeah, thinking about it that does seem to be more along the lines of how I'd
build an oscillator...

R2 is high. If the worst case leakage of 1uA happens that would put you
above the min threshold.

Good catch, I'll change that.

You need a full ground plane. For example, the ground trace to R2 tunnels
right through the "hot zone" underneath the inductor. As Mark suggested
run a big fat wire from the ground at R5 to pin 4 and another from C2 to
pin 4. Cut the ground trace to R2 off right at that resistor and run a fat
wire to pin 4. It'll be messy but this gets you as close to a good ground
as possible without a relayout.

I have no qualms about messy. :-) I'll try out those modifications tomorrow
and let you know what happens.

Check the source. Does it become soft at the point where jitter starts?

I'll check it.

I am sure you did this but just in case: Make sure your digital scope
definitely does not go into equivalent time sampling. Or just use a real
scope like a Tek 2465.

The scope shots are from an Agilent MSO 6000 which I don't think even has
the option to do equivalent time sampling (it's 1GHz frequency response,
4GSps)... but I'll fire up the 2465 to verify that it's not lying to me.


I wouldn't be surprised if that goes into equivalent time at 5nsec/div
or 10nsec/div. But it is in a much higher price bracket than mine so
maybe it has the option not to switch or at least announces when it does so.


As usual, thanks for the help. Stay warm tonight!


Cranking the wood stove 24/7 right now. Can someone send us a chunk of
that global warming?

--
Regards, Joerg

http://www.analogconsultants.com/

On Mon, 04 Feb 2008 18:26:23 GMT, Joerg
wrote:

Joel Koltner wrote:
Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm enough
that much of it is already melted.


I almost slid down the driveway on my behind this morning :-(

[snip]

My hair got wet this morning, and it's only 46°F ;-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

I've made some modifications...

-- Cutting the ground trace that exits R5 and heads horizontally to the ground
test point/via and instead using a fat wire connection from R3's ground over
to pin 4 of U1
-- Cutting the ground trace from R2 and instead running it back to pin 4 of U1
(with wirewrap wire)
-- Changed R1 and R2 to 270k so that with worst case leakage the part doesn't
try to change modes (fixing design error that Joerg pointed out)

(I also checked that the digital scope's display is believable and that the
source voltage wasn't sagging.)

This improves things some: there's noticeably less jitter, although if you
look closely it's still there (interestingly, it's easier to *not* notice on a
Tek 2465 than a digital scope... hmm...). I don't think there's a lot left to
do on this particular PCB, but I'm thinking the results are good enough that
it's safe to put the design on a 4-layer boad and see what happens.

I'm amazed that a switcher at "only" 1.4MHz on a board that's 3/4" square can
be so difficult to tame.

---Joel

Jim Thompson wrote:
On Mon, 04 Feb 2008 18:26:23 GMT, Joerg
wrote:

Joel Koltner wrote:
Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm enough
that much of it is already melted.

I almost slid down the driveway on my behind this morning :-(

[snip]

My hair got wet this morning, and it's only 46°F ;-)


We had a pretty hard freeze last night. Again. Totally unusual. When we
moved here we sat outside in shorts and T-shirts on Feb-4. I guess
that's all history. So where is Al Gore's warming?

The winters have become almost digital here. Suddenly the temps drop
rapidly and you go from T-shirt to thick flannell in less than 24 hours.
Then it stays cold for months. We used almost none of the fire starters
because the wood stove didn't get a break since late November.

--
Regards, Joerg

http://www.analogconsultants.com/

Hi Joerg,

"Joerg" wrote in message
...
When I have the luxury of a 4-layer I usually drop vias where needed. No
routing ground traces back and stuff.

OK, that makes good sense.

Ok, specialty caps can work. But we all know how it goes later. Someone from
purchasing finds a much more "economical" part, a rep sweet-talks them into
it, you are on vacation and someone signs the ECO ... poof.

In my case I think there's a greater chance that someone will take the X5R/X7R
ceramic cap and find that... hey... there's this other "ceramaic cap" that's
much cheaper... let's use it! ...and it turns out to be a Y5V.

Clients who insist on assembly in high-wage countries must often eat
placement costs of several cents per part and that requires a whole
different design strategy.

Better the money goes to boutique capacitor manufacturers than assemblers?

(regarding C3)
I never use such caps at all.

Any ideas why the folks at Linear do? Am I correct in thinking that it's a
bit of a "speed up" cap/high-pass filter that's meant to provide improved
transient response? It seems as though usually the transient response is
going to be determined by C2/R3/C1 anyway.

Then again, I rarely use integrated switchers that are single-sourced.

Any suggestion on multi-sourced/readily avaialble ICs that are small (I'm sure
the PCB layout guy would already be throwing a fit at SO-8 sized) and fast
(1MHz so that the inductor can be small)?

---Joel

On Mon, 4 Feb 2008 13:05:30 -0800, "Joel Koltner"
wrote:

I've made some modifications...

-- Cutting the ground trace that exits R5 and heads horizontally to the ground
test point/via and instead using a fat wire connection from R3's ground over
to pin 4 of U1
-- Cutting the ground trace from R2 and instead running it back to pin 4 of U1
(with wirewrap wire)
-- Changed R1 and R2 to 270k so that with worst case leakage the part doesn't
try to change modes (fixing design error that Joerg pointed out)

(I also checked that the digital scope's display is believable and that the
source voltage wasn't sagging.)

This improves things some: there's noticeably less jitter, although if you
look closely it's still there (interestingly, it's easier to *not* notice on a
Tek 2465 than a digital scope... hmm...). I don't think there's a lot left to
do on this particular PCB, but I'm thinking the results are good enough that
it's safe to put the design on a 4-layer boad and see what happens.

I'm amazed that a switcher at "only" 1.4MHz on a board that's 3/4" square can
be so difficult to tame.

I'm not amazed at the difficulty. Any switcher has really fast edges
which make the layout that much harder. Magic rule is the small signal
grounds get hooked up directly to the ground pin of the IC - never to
a ground plane unless you can guarantee that there will be no high
current signals passing by.

Joel Koltner wrote:
Hi Joerg,

"Joerg" wrote in message
...
When I have the luxury of a 4-layer I usually drop vias where needed. No
routing ground traces back and stuff.

OK, that makes good sense.

Ok, specialty caps can work. But we all know how it goes later. Someone from
purchasing finds a much more "economical" part, a rep sweet-talks them into
it, you are on vacation and someone signs the ECO ... poof.

In my case I think there's a greater chance that someone will take the X5R/X7R
ceramic cap and find that... hey... there's this other "ceramaic cap" that's
much cheaper... let's use it! ...and it turns out to be a Y5V.


Remember the late 80's? Z5U was all the rage. "Hey, not only are they
cheaper, we can also use smaller footprints!" Then a chemical plant had
an explosion and it was pretty much the main source for the stuff that
mixes up this ceramic. People were bidding on those caps like in a Texas
style auction until the last one was gone and whole production lines
came to a grinding halt.


Clients who insist on assembly in high-wage countries must often eat
placement costs of several cents per part and that requires a whole
different design strategy.

Better the money goes to boutique capacitor manufacturers than assemblers?


Well, you have to weigh one against the other and see what is lower in
cost. At the end of the day SMT assembly just isn't competitive at
prices of several cents a pop (for mass production).


(regarding C3)
I never use such caps at all.

Any ideas why the folks at Linear do? Am I correct in thinking that it's a
bit of a "speed up" cap/high-pass filter that's meant to provide improved
transient response? It seems as though usually the transient response is
going to be determined by C2/R3/C1 anyway.


It might be there to compensate for the input capacitance at FB. Just
ask them via email.


Then again, I rarely use integrated switchers that are single-sourced.

Any suggestion on multi-sourced/readily avaialble ICs that are small (I'm sure
the PCB layout guy would already be throwing a fit at SO-8 sized) and fast
(1MHz so that the inductor can be small)?


Unfortunately not. I don't design many buck converters, it's mostly
boost, SEPIC or Forward. There my favorite is the LM3478 but it won't
work here. You could design one around a Schmitt Inverter but it'll cost
extra time upfront. The reward would come years down the road where
you'd be sipping margaritas while others frantically deal with part
obsolescences. I suppose this isn't a mass product. If it were you'd
almost have to do a discrete design.

Do you really need 90% efficiency here?

--
Regards, Joerg

http://www.analogconsultants.com/

Joel Koltner wrote:
I've made some modifications...

-- Cutting the ground trace that exits R5 and heads horizontally to the ground
test point/via and instead using a fat wire connection from R3's ground over
to pin 4 of U1
-- Cutting the ground trace from R2 and instead running it back to pin 4 of U1
(with wirewrap wire)
-- Changed R1 and R2 to 270k so that with worst case leakage the part doesn't
try to change modes (fixing design error that Joerg pointed out)

(I also checked that the digital scope's display is believable and that the
source voltage wasn't sagging.)

This improves things some: there's noticeably less jitter, although if you
look closely it's still there (interestingly, it's easier to *not* notice on a
Tek 2465 than a digital scope... hmm...). ...


Sure the DSO doesn't switch to equivalent time? I can't use mine above
25nsec/div on switchers because they didn't toss me the firmware keys to
disable that "feature". Here is a pretty sure-fire method to verify jitter:

Hook up a spectrum analyzer but make sure not to fry it's input (use a
really loose coupling and attenuate). Find the carrier, switch to peak
hold and then vary the input voltage. Jitter should produce a pronounced
broadening around the carrier.


... I don't think there's a lot left to
do on this particular PCB, but I'm thinking the results are good enough that
it's safe to put the design on a 4-layer boad and see what happens.

I'm amazed that a switcher at "only" 1.4MHz on a board that's 3/4" square can
be so difficult to tame.


Remember that the mods above are still kludges. Ideally the traces
should be on the other side of the ground plane.

--
Regards, Joerg

http://www.analogconsultants.com/

On Mon, 4 Feb 2008 13:05:30 -0800, "Joel Koltner"
wrote:

snip
This improves things some: there's noticeably less jitter, although if you
look closely it's still there (interestingly, it's easier to *not* notice on a
Tek 2465 than a digital scope... hmm...). I don't think there's a lot left to
do on this particular PCB, but I'm thinking the results are good enough that
it's safe to put the design on a 4-layer boad and see what happens.

I'm amazed that a switcher at "only" 1.4MHz on a board that's 3/4" square can
be so difficult to tame.

I'd check on output ripple and dynamic response around the suspected
operating point, at different temperature extremes. If it doesn't show
up on the output as subharmonics or poor damping, it's ignorable.

RL

On Mon, 4 Feb 2008 13:05:30 -0800, "Joel Koltner"
wrote:

snip
This improves things some: there's noticeably less jitter, although if you
look closely it's still there (interestingly, it's easier to *not* notice on a
Tek 2465 than a digital scope... hmm...).

Using the same probes?

RL

Hi Joerg,

"Joerg" wrote in message
...
People were bidding on those caps like in a Texas style auction until the
last one was gone and whole production lines came to a grinding halt.

Scary... I wasn't around for that particular problem, but I do remember in the
mid-'90s when it seemed that tantulum capacitors had pretty much all dried up
and gone away. That seemed to be what spurred the ceramics guys to do some
research, development new products, and really "buy back" a lot of the market.
(Well, that and probably some of your clients who took your advice to never
use tantulums in the first place so they instead placed multi-million part
orders for ceramics. :-) )

It might be there to compensate for the input capacitance at FB. Just ask
them via email.

Will do.

I suppose this isn't a mass product.

No, initial quantities are going to be in the hundreds and I even hitting
10,000 if things were wildly successful is pretty unlikely.

Given how many different single-sourced switcher controllers the folks at
Linear, National, Maxim, TI and others have, *someone* has got to be buying
those LTC3404's (and others) in the hundreds of thousands.

Do you really need 90% efficiency here?

If I'm reasonably objective about it, no, 80% would probably be OK; I'll just
wince a little.

---Joel

"legg" wrote in message
...
Using the same probes?

Yes, it's less noticeably on the '2465 due to the switch transitions naturally
being dimmer due to their high dV/dt whereas on the digital scope everything
(vertical and horizontal traces) is approximately the same intensity.

Joel Koltner wrote:
(snip)

... I don't think there's a lot left to
do on this particular PCB, but I'm thinking the results are good enough that
it's safe to put the design on a 4-layer boad and see what happens.

Don't forget to put a hole in the layers under the switching
output pads and trace. You don't want a capacitive load on
that node to anything.

--
Regards,

John Popelish

Joel Koltner wrote:
Hi Joerg,

"Joerg" wrote in message
...
People were bidding on those caps like in a Texas style auction until the
last one was gone and whole production lines came to a grinding halt.

Scary... I wasn't around for that particular problem, but I do remember in the
mid-'90s when it seemed that tantulum capacitors had pretty much all dried up
and gone away. That seemed to be what spurred the ceramics guys to do some
research, development new products, and really "buy back" a lot of the market.
(Well, that and probably some of your clients who took your advice to never
use tantulums in the first place so they instead placed multi-million part
orders for ceramics. :-) )

It might be there to compensate for the input capacitance at FB. Just ask
them via email.

Will do.

I suppose this isn't a mass product.

No, initial quantities are going to be in the hundreds and I even hitting
10,000 if things were wildly successful is pretty unlikely.

Given how many different single-sourced switcher controllers the folks at
Linear, National, Maxim, TI and others have, *someone* has got to be buying
those LTC3404's (and others) in the hundreds of thousands.

Do you really need 90% efficiency here?

If I'm reasonably objective about it, no, 80% would probably be OK; I'll just
wince a little.


How much current do you need out of it? I suppose a few ten mA and there
you can afford a lower switching frequency.

--
Regards, Joerg

http://www.analogconsultants.com/

Joel Koltner wrote:
"legg" wrote in message
...
Using the same probes?

Yes, it's less noticeably on the '2465 due to the switch transitions naturally
being dimmer due to their high dV/dt whereas on the digital scope everything
(vertical and horizontal traces) is approximately the same intensity.


With delayed trigger and hold-off you could look at a transition, say,
ten cycles behind the trigger. Then blow that up until you see the
transition well enough. That should show the jitter.

Easy on the delay trigger clutch if the 2465 is really old. It becomes
brittle and breaks easily. The repair is absolutely no fun. BTDT.

--
Regards, Joerg

http://www.analogconsultants.com/

"Joerg" wrote in message
t...
How much current do you need out of it? I suppose a few ten mA and there you
can afford a lower switching frequency.

I started with 150mA absolute maximum, and at this point 100mA looks like
plenty. I actually have tried this board at a lower frequency -- Linear has
the LTC1877 which is footprint-compatible with the LTC3404 and switches at
550kHz. Efficiency is noticeably better at 550kHz (up to 95%!), but the
larger inductor needed is too big for the PCB. It also jitters a bit, but
significantly less so than the '3404 (not too surprisingly).

---Joel

Joel Koltner wrote:
"Joerg" wrote in message
t...
How much current do you need out of it? I suppose a few ten mA and there you
can afford a lower switching frequency.

I started with 150mA absolute maximum, and at this point 100mA looks like
plenty. I actually have tried this board at a lower frequency -- Linear has
the LTC1877 which is footprint-compatible with the LTC3404 and switches at
550kHz. Efficiency is noticeably better at 550kHz (up to 95%!), but the
larger inductor needed is too big for the PCB. It also jitters a bit, but
significantly less so than the '3404 (not too surprisingly).


Ok, not shielded and a bit tight on current but should be in the ballpark:

Digikey P/N 490-2521-1-ND

How large can it be?

If you wanted to really curb jitter in a test you could drill holes and
run the rework wires behind the ground plane.

--
Regards, Joerg

http://www.analogconsultants.com/

Hi Joerg,

"Joerg" wrote in message
t...
Ok, not shielded and a bit tight on current but should be in the ballpark:
Digikey P/N 490-2521-1-ND
How large can it be?

That would work... what I currently have is a Pulse PG0085 series, 4.3mm
square (bigger than yours... although my in 207mohms, yours is 1.1ohms so a
little lossier there... although a PG0085 with a comparable inductance is
about 930mohms).

If you wanted to really curb jitter in a test you could drill holes and run
the rework wires behind the ground plane.

Yeah, but the test board is only the two layers shown -- no ground plane.

You think the 550kHz part would be preferable, eh?

---Joel

Joel Koltner wrote:
Hi Joerg,

"Joerg" wrote in message
t...
Ok, not shielded and a bit tight on current but should be in the ballpark:
Digikey P/N 490-2521-1-ND
How large can it be?

That would work... what I currently have is a Pulse PG0085 series, 4.3mm
square (bigger than yours... although my in 207mohms, yours is 1.1ohms so a
little lossier there... although a PG0085 with a comparable inductance is
about 930mohms).


This was just one from a quick peek. There are better ones and you'd
probably want to search for shielded versions such as these:

http://www.tdk.co.jp/tefe02/e531_vlcf4020.pdf

Usually good prices, too. The 33uH would get you down to 600mohm if
that's a concern. The 47uH would probably be about on par with the same
value Pulse series.


If you wanted to really curb jitter in a test you could drill holes and run
the rework wires behind the ground plane.

Yeah, but the test board is only the two layers shown -- no ground plane.

You think the 550kHz part would be preferable, eh?


Personally, yes. Less EMI trouble. It also depends on what else is in
the box and where that ciruitry is most sensitive.

--
Regards, Joerg

http://www.analogconsultants.com/

"Jim Thompson" wrote in
message ...
On Mon, 04 Feb 2008 18:26:23 GMT, Joerg
wrote:

Joel Koltner wrote:
Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm
enough
that much of it is already melted.


I almost slid down the driveway on my behind this morning :-(

[snip]

My hair got wet this morning, and it's only 46°F ;-)

...Jim Thompson
Lucky guy - you still got hair?

On Tue, 05 Feb 2008 19:10:41 GMT, "Oppie" wrote:


"Jim Thompson" wrote in
message ...
On Mon, 04 Feb 2008 18:26:23 GMT, Joerg
wrote:

Joel Koltner wrote:
Joerg!

How's it doing weather-wise down in your part of the country? It snowed
like mad Friday night and much of yesterday, although it's been warm
enough
that much of it is already melted.


I almost slid down the driveway on my behind this morning :-(

[snip]

My hair got wet this morning, and it's only 46°F ;-)

...Jim Thompson
Lucky guy - you still got hair?


Yes. Albeit a wee bit thin... and all silver/white.

The distressing part is the chest hair, turning gray gradually working
its way from the shoulders downward :-(

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

This is the first cut of the production department's layout for this switcher.
I saw "first cut" because IMO it needs some serious adjustment -- with the
most obvious problem being the distance between L3 and C87. This is an
8-layer board (don't ask), and both ground and the output of the switcher
("Vcore") go to their own dedicated planes whereas the switcher's input
("VBAT") is a larger copper pour on another layer. (I've turned off the
layers other than the top as none of the switcher's nets are routed on them
and they make for a considerably messier plot... C28 and C30 are decoupling
the power pins on a connector that's on the bottom side of the board, if
anyone's curious.)

Critiques are always welcome!

---Joel

Joel Koltner wrote:
This is the first cut of the production department's layout for this switcher.
I saw "first cut" because IMO it needs some serious adjustment -- with the
most obvious problem being the distance between L3 and C87. This is an
8-layer board (don't ask), and both ground and the output of the switcher
("Vcore") go to their own dedicated planes whereas the switcher's input
("VBAT") is a larger copper pour on another layer. (I've turned off the
layers other than the top as none of the switcher's nets are routed on them
and they make for a considerably messier plot... C28 and C30 are decoupling
the power pins on a connector that's on the bottom side of the board, if
anyone's curious.)

Critiques are always welcome!


The distance to C87 isn't so bad since you wrote that this node is now
on a full plane. So it has lots of local capacitance to the ground
plane, hoping they are adjacent. Plus a really low "trace" impedance.

Just fire it up and see how it performs.

--
Regards, Joerg

http://www.analogconsultants.com/

Hi Joerg,

"Joerg" wrote in message
t...
The distance to C87 isn't so bad since you wrote that this node is now on a
full plane. So it has lots of local capacitance to the ground plane, hoping
they are adjacent. Plus a really low "trace" impedance.

This is all true, but I'd much rather have the capacitor that's supposed to
knock the edges off of those switching spikes snuggled right up next to the
inductor connected with some rather fat traces instead of going through two
smallish vias (inductor to the plane) and then two more (plane back to the
capacitor).

The Vcore net powers a DSP that contains an internal DLL to crank a reference
8MHz up to 100MHz or thereabouts. We've found that the jitter on that DLL's
output is quite sensitive to the output capacitance of this swittcher.
Changing the 47uF output to 10uF will cause the DLL to unlock pretty regularly
(this is a Bad Thing!), and even going to 22uF causes an occasional loss of
lock and noticeably more jitter.

Just fire it up and see how it performs.

We won't be getting stuffed boards back for something like a month, but I'll
let you know how it goes then!

As usual, thanks for your help.

---Joel

Joel Koltner wrote:
Hi Joerg,

"Joerg" wrote in message
t...
The distance to C87 isn't so bad since you wrote that this node is now on a
full plane. So it has lots of local capacitance to the ground plane, hoping
they are adjacent. Plus a really low "trace" impedance.

This is all true, but I'd much rather have the capacitor that's supposed to
knock the edges off of those switching spikes snuggled right up next to the
inductor connected with some rather fat traces instead of going through two
smallish vias (inductor to the plane) and then two more (plane back to the
capacitor).

The Vcore net powers a DSP that contains an internal DLL to crank a reference
8MHz up to 100MHz or thereabouts. We've found that the jitter on that DLL's
output is quite sensitive to the output capacitance of this swittcher.
Changing the 47uF output to 10uF will cause the DLL to unlock pretty regularly
(this is a Bad Thing!), and even going to 22uF causes an occasional loss of
lock and noticeably more jitter.


This is not good at all. Something on that DSP seems to be quite
marginal if a wee ripple can knock it off the rocker. Even if you'd
remove the ripple, what if Hubble calls the home star where the Great
Dane lives from the lot next door and his radio makes the power plane
weave a bit?


Just fire it up and see how it performs.

We won't be getting stuffed boards back for something like a month, but I'll
let you know how it goes then!

As usual, thanks for your help.


I'd still call up the app engineers of the DSP manufacturer to see
what's going on in that thing in terms of loop stability.

--
Regards, Joerg

http://www.analogconsultants.com/