Hi Mark,

"qrk" wrote in message
...
One potential layout problem is where you connect the grounds from C2,
R3, & R5. They should attach to pin-4, not the ground terminal. See
the attachment. I put the mod in cyan.

Cool, I'll try that tomorrow morning.

You have two vias inbetween L1 and C5. They shouldn't be there and you
can pick off that voltage from your Vout terminal on the bottom right.

The idea there was to give the "real" output (which is off of the connector
on the bottom; what's labeled as "Vout" in the lower right of the PCB is
just a test point, really) a slightly lower impedance (smaller loop area)
back to the anode of C5. I suppose I could drill out those vias and use a
bit of copper tape on the bottom to test your idea here though?

Can you get rid of the alignment holes for J5?

Yes, done.

Your output capacitor is pretty big. What's the impedance of C5 at
1.4MHz?

18 milliohms, give or take. The input and output capacitors are Panasonic
speciality polymer (SP) capacitors, which have incredibly good performance
for their size. DigiKey has a training module on them he
http://dkc1.digikey.com/us/en/PTM/10_SPCaps.html. They're not *quite* as
good as ceramics in the ESR department, but they're generally smaller (at
least for the same capacitance) and noticeably cheaper than cermaics.

As others have suggested, though, and due to having to shrink the board
some, I have changed to 10uF ceramics. Or at least I will once those parts
arrive in a few days.

You may want to use an R/C combo for your loop compensation (R3 & C1).
Use a trimpot for R3 while experimenting.

If I have some time I'll try that. Is there any benefit to an R/C
combination (the R just provides a zero, right?) other than faster transient
response (i.e., recovery from a load step)?

Thank you for your suggestions, Mark.

---Joel