With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


--
Thanks,
- Win

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

On Sun, 15 Jul 2007 23:53:10 -0500, Spehro Pefhany
wrote:

On Sun, 15 Jul 2007 16:25:14 -0700, the renowned John Larkin
wrote:


With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

What's the purpose of the SSR, just to have two ranges of current
source?

Yup.


If so, it might be cheaper and more accurate to have two
sources in parallel.

Think so? It would have to be calibrated anyhow. The ssr looked pretty
simple.


John

On Sun, 15 Jul 2007 16:25:14 -0700, the renowned John Larkin
wrote:


With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

What's the purpose of the SSR, just to have two ranges of current
source? If so, it might be cheaper and more accurate to have two
sources in parallel.



Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com

On Sun, 15 Jul 2007 20:26:05 -0700, John Larkin
wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

Jack-of-all-trades and master-of-none ?:-)

I find universal instruments to be less than adequate.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

On Mon, 16 Jul 2007 07:15:36 -0700, Jim Thompson
wrote:

On Sun, 15 Jul 2007 20:26:05 -0700, John Larkin
wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

Jack-of-all-trades and master-of-none ?:-)

I find universal instruments to be less than adequate.

...Jim Thompson


I'd sure like to have a good pcb trace short-finder, and if it did
big-C measurements and ESR, that would be nice too.

Oh, nobody else has noticed, so I note that my gadget wouldn't be
terribly useful at measuring inductance.

Analyze this!

John

John Larkin wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:


John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.



Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....

Don't know what you'll be using for the SSR but how 'bout a big old FET?

--
Regards, Joerg

http://www.analogconsultants.com

On Mon, 16 Jul 2007 08:47:44 -0700, Joerg
wrote:

John Larkin wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:


John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.



Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....


I was thinking I'd prefer a fast ADC, with fewer bits, so we could
take a lot of samples and do some waveform crunching. But an adc with
nasty stats wouldn't be good. I've been using some ADS7866's lately,
12 bits, SOT-23, SPI, and they work great.


Don't know what you'll be using for the SSR but how 'bout a big old FET?

We have some cheap 4-ohm ssr's in stock, so I just assumed them. I use
them a lot in signal switching situations. My tendency lately is to
minimize parts count more than parts cost, since it costs us 20 cents
or so to place a part. A fet would need gate drive stuff, unless we
feed the current source from the same voltage that powers the uP.

John

On Mon, 16 Jul 2007 08:32:27 -0700, John Larkin
wrote:

[snip]

I'd sure like to have a good pcb trace short-finder, and if it did
big-C measurements and ESR, that would be nice too.

[snip]

John


I did one at GenRad about 30 years ago... just OpAmps with an AutoZero
loop around them, so that you can get µV equivalent offsets.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

"John Larkin" wrote in message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.
With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.
Regards,
Harry

John Larkin wrote:

[...]


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....



I was thinking I'd prefer a fast ADC, with fewer bits, so we could
take a lot of samples and do some waveform crunching. But an adc with
nasty stats wouldn't be good. I've been using some ADS7866's lately,
12 bits, SOT-23, SPI, and they work great.


I've used the AD7928 in a recent design. 8-ch 12-bits, very clean,
pleasantly surprised. The SPI didn't quite like to be handled per
datasheet, it wanted the opposite clock edge. Other than that AD sure
knows how to design quiet ADCs.


Don't know what you'll be using for the SSR but how 'bout a big old FET?


We have some cheap 4-ohm ssr's in stock, so I just assumed them. I use
them a lot in signal switching situations. My tendency lately is to
minimize parts count more than parts cost, since it costs us 20 cents
or so to place a part. A fet would need gate drive stuff, unless we
feed the current source from the same voltage that powers the uP.


20 cents? Ouch, that hurts. On my side that would require some
re-learning of design strategies ;-)

Does that 20c still apply once the stencil NRE is amortized?

--
Regards, Joerg

http://www.analogconsultants.com

On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
.. .

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
. ..

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher
to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe 10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.
Extrapolating back the slope to get ESR sounds neat.
Not bitching, just trying to understand the master.
Cheers,
Harry

On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
.. .
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher
to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe 10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
. ..
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
m...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry

On Tue, 17 Jul 2007 08:18:20 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
.. .
On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
...
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
om...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry


Nice. That can digitize a slow charge and also nab a high-current
discharge, extending ESR measurments to smaller caps. To do it really
right, lead resistance will need to be removed, so the cap voltage has
to be (nearly) simultaneously sampled with the discharge current,
interleaved maybe, with more math!

What if you charge a cap to a known voltage and pulse-discharge it for
a bit, constant-current or constant-r, and measure the residual
voltage. That would also inferr ESR, but might suffer from dielectric
absorption errors.

Yup, something can definitely be done in the discharge path to improve
ESR resolution.

Maybe we could consider a DSP or FPGA, instead of a slower uP. High
sample rates could be interesting.

John

John Larkin wrote:

On Tue, 17 Jul 2007 08:18:20 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
. ..

On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
m...

On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
news:3oal931elporg4t6o0np71mgjs11m3u2kv@4ax. com...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John



As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.


Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.


Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry



Nice. That can digitize a slow charge and also nab a high-current
discharge, extending ESR measurments to smaller caps. To do it really
right, lead resistance will need to be removed, so the cap voltage has
to be (nearly) simultaneously sampled with the discharge current,
interleaved maybe, with more math!

What if you charge a cap to a known voltage and pulse-discharge it for
a bit, constant-current or constant-r, and measure the residual
voltage. That would also inferr ESR, but might suffer from dielectric
absorption errors.

Yup, something can definitely be done in the discharge path to improve
ESR resolution.

Maybe we could consider a DSP or FPGA, instead of a slower uP. High
sample rates could be interesting.


Or get a 16-bitter like the MSP430 with a HW multiplier. That ought to
do it. Comes with direct LCD drivers as well if you take the larger
packages.

--
Regards, Joerg

http://www.analogconsultants.com

Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.

Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).

Tim

--
Deep Fryer: A very philosophical monk.
Website @ http://webpages.charter.net/dawill/tmoranwms

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
.. .
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we
should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either
apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

On Tue, 17 Jul 2007 23:22:41 -0500, "Tim Williams"
wrote:

Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.

That is close to a mini VNA. That actually might not be hard to do.
DDS synthesizers are cheap nowadays.

Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).

Equivalent time sampling.

John

"John Larkin" wrote in message
...
On Tue, 17 Jul 2007 23:22:41 -0500, "Tim Williams"
wrote:
Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.
That is close to a mini VNA. That actually might not be hard to do.
DDS synthesizers are cheap nowadays.

A single port VNA, yes. See, e.g., http://w5big.com/index.htm . Goes down to
100kHz, which should be reasonable for measuring ESR.

---Joel

John Larkin wrote:

On Tue, 17 Jul 2007 23:22:41 -0500, "Tim Williams"
wrote:


Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.


That is close to a mini VNA. That actually might not be hard to do.
DDS synthesizers are cheap nowadays.


Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).


Equivalent time sampling.


Depends on the ingenuity of the marketeer writing the brochure. The job
is to make it sound as close to realtime sampling as possible without
legally saying it ;-)

--
Regards, Joerg

http://www.analogconsultants.com

"John Larkin" wrote in
message
With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)


--

Reply in group, but if emailing add another
zero, and remove the last word.

"Tom Del Rosso" wrote in message
...


Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)


No, that's a P channel....

The arrow point in for an N channel.

"Lord Garth" wrote in message
. net
"Tom Del Rosso" wrote in message
...


Stupid question, but when the arrow is on the drain instead of the
gate, does "pointing out" mean N-channel? (Unless those are
IGBJTs...)


No, that's a P channel....

The arrow point in for an N channel.

Ok, the same as when the arrow is on the gate. Thanks.


--

Reply in group, but if emailing add another
zero, and remove the last word.

On Wed, 18 Jul 2007 09:35:38 -0700, Joerg
wrote:

John Larkin wrote:

On Tue, 17 Jul 2007 23:22:41 -0500, "Tim Williams"
wrote:


Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.


That is close to a mini VNA. That actually might not be hard to do.
DDS synthesizers are cheap nowadays.


Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).


Equivalent time sampling.


Depends on the ingenuity of the marketeer writing the brochure. The job
is to make it sound as close to realtime sampling as possible without
legally saying it ;-)

All the really fast scopes, up to 70 GHz or so, are equivalent-time
samplers. My 20 GHz 11801's sample at 200 KHz max.

Some of the cheap digital scopes start as realtime samplers and cut
over to equivalent-time at some point. Look for a scope with, say, 100
MHz bandwidth and 50 MHz sampling rate.

The VNA-type esr meter could sample very slowly, as long as the s/h
was fast and the samples happen at the right phase angle. VNAs used to
use equivalent-time sampling, using the same sampling-scope front-end
hardware, and maybe some still do.

The ESR meter could be approached in either domain.

John

On Wed, 18 Jul 2007 14:22:07 -0400, "Tom Del Rosso"
wrote:

"John Larkin" wrote in
message
With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)

It's an n-channel, and the arrow is the source. That's the way I draw
them. It makes a lot more sense to me, just an NPN transistor with an
insulated gate, with the arrow showing the direction of current flow.

John

Hello John,


Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.


That is close to a mini VNA. That actually might not be hard to do.
DDS synthesizers are cheap nowadays.



Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).


Equivalent time sampling.


Depends on the ingenuity of the marketeer writing the brochure. The job
is to make it sound as close to realtime sampling as possible without
legally saying it ;-)


All the really fast scopes, up to 70 GHz or so, are equivalent-time
samplers. My 20 GHz 11801's sample at 200 KHz max.


My GHz scope at least goes to 20MS/sec but that's still slow.


Some of the cheap digital scopes start as realtime samplers and cut
over to equivalent-time at some point. Look for a scope with, say, 100
MHz bandwidth and 50 MHz sampling rate.


Got one coming (Instek) but it'll be another week, has to go through
customs. I heard that it might cut over when you select less than
25nsec/div. For a 1Gs/sec scope that's a bit early but I guess they will
come out with some firmware upgrades and hopefully one that places this
under at least a little bit of user control.


The VNA-type esr meter could sample very slowly, as long as the s/h
was fast and the samples happen at the right phase angle. VNAs used to
use equivalent-time sampling, using the same sampling-scope front-end
hardware, and maybe some still do.


I guess nearly all of them do. With one impedance analyzer (HP4191) here
I had the "privilege" of repairing it. But I am not complaining
because we all learn when doing that. It contains a discrete slope
converter where they spent a whole lot of effort on making that low
noise, incredible dynamic range but very slow.


The ESR meter could be approached in either domain.


Or buy a boat anchor analyzer. Of course, that can give you a mighty
back pain when repair time cometh.

--
Regards, Joerg

http://www.analogconsultants.com

John Larkin wrote:
On Tue, 17 Jul 2007 08:18:20 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
. ..

On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
m...

On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
news:3oal931elporg4t6o0np71mgjs11m3u2kv@4ax. com...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John



As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.


Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.


Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry



Nice. That can digitize a slow charge and also nab a high-current
discharge, extending ESR measurments to smaller caps. To do it really
right, lead resistance will need to be removed, so the cap voltage has
to be (nearly) simultaneously sampled with the discharge current,
interleaved maybe, with more math!

What if you charge a cap to a known voltage and pulse-discharge it for
a bit, constant-current or constant-r, and measure the residual
voltage. That would also inferr ESR, but might suffer from dielectric
absorption errors.

Yup, something can definitely be done in the discharge path to improve
ESR resolution.

But as a practical matter, how much resolution is really
necessary?

Ed


Maybe we could consider a DSP or FPGA, instead of a slower uP. High
sample rates could be interesting.

John

ehsjr wrote:

But as a practical matter, how much resolution is really
necessary?



That depends on the size of the electrolytic, and how critical it is
to the circuit design.


--
Service to my country? Been there, Done that, and I've got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida

On Sat, 21 Jul 2007 17:35:55 GMT, ehsjr
wrote:

John Larkin wrote:
On Tue, 17 Jul 2007 08:18:20 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
...

On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
om...

On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
news:3oal931elporg4t6o0np71mgjs11m3u2kv@4ax .com...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John



As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.


Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.


Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry



Nice. That can digitize a slow charge and also nab a high-current
discharge, extending ESR measurments to smaller caps. To do it really
right, lead resistance will need to be removed, so the cap voltage has
to be (nearly) simultaneously sampled with the discharge current,
interleaved maybe, with more math!

What if you charge a cap to a known voltage and pulse-discharge it for
a bit, constant-current or constant-r, and measure the residual
voltage. That would also inferr ESR, but might suffer from dielectric
absorption errors.

Yup, something can definitely be done in the discharge path to improve
ESR resolution.

But as a practical matter, how much resolution is really
necessary?

Ed


"Resolution" in the sense of being able to resolve milliohms. We are
currently buying polymer aluminum electrolytic caps that have typical
ESRs in the 1-2 mohm range. And there's a host of various LDOs,
integrated switchers, and homebrew power supplies around that care a
great deal about output cap ESR. The inverting switcher I posted to
this group cares a lot about cap esr; it needs low esr to kill output
ripple and high esr for loop stability, with, optimistically, some
workable compromise point in the middle.

ESR over temperature is an even nastier issue. I bet there's a lot of
electronics out there that will fail below 0C, as the caps change esr
and the regulator loops start to oscillate.

If all you want to do us spot bad filter caps in TV power supplies, a
simple 2-wire scalar impedance measurement, in the 1 ohm ballpark, is
all you need. But then, checking ripple with a scope is just as good.
A true esr measurent instrument would be useful in design, and it may
as well perform some other functions while you're at it.

John

On Sat, 21 Jul 2007 10:54:41 -0700, John Larkin
wrote:

[snip]

ESR over temperature is an even nastier issue. I bet there's a lot of
electronics out there that will fail below 0C, as the caps change esr
and the regulator loops start to oscillate.

If all you want to do us spot bad filter caps in TV power supplies, a
simple 2-wire scalar impedance measurement, in the 1 ohm ballpark, is
all you need. But then, checking ripple with a scope is just as good.
A true esr measurent instrument would be useful in design, and it may
as well perform some other functions while you're at it.

John


Some of us know enough to build it in ;-) See attachment.

This is a low current (15mA max) situation, but the same methodology
applies.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

"John Larkin" wrote in message

But as a practical matter, how much resolution is really
necessary?

Ed


"Resolution" in the sense of being able to resolve milliohms. We are
currently buying polymer aluminum electrolytic caps that have typical
ESRs in the 1-2 mohm range. And there's a host of various LDOs,
integrated switchers, and homebrew power supplies around that care a
great deal about output cap ESR. The inverting switcher I posted to
this group cares a lot about cap esr; it needs low esr to kill output
ripple and high esr for loop stability, with, optimistically, some
workable compromise point in the middle.

ESR over temperature is an even nastier issue. I bet there's a lot of
electronics out there that will fail below 0C, as the caps change esr
and the regulator loops start to oscillate.

If all you want to do us spot bad filter caps in TV power supplies, a
simple 2-wire scalar impedance measurement, in the 1 ohm ballpark, is
all you need. But then, checking ripple with a scope is just as good.
A true esr measurent instrument would be useful in design, and it may
as well perform some other functions while you're at it.

John

As JL points out, in designing power supplies (Power Electronics), the need
to know the Cap's ESR from 1.0mR to 150mR is very important. If the meter
petered out at 10mR then you will lose a large part of the market. Also ESL
but that is usually a small quantity in low ESR caps but if this tester did
ESZ that may be as good or better than ESR, killing two birds with one
stone.
Cheers,
Harry

John Larkin wrote:
On Sat, 21 Jul 2007 17:35:55 GMT, ehsjr
wrote:


John Larkin wrote:

On Tue, 17 Jul 2007 08:18:20 -0700, "Harry Dellamano"
wrote:



"John Larkin" wrote in message
m...


On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:



"John Larkin" wrote in
message
news:6r1o931p55g9kmk2k387pkgaiclohl9msn@4ax. com...


On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:



"John Larkin" wrote in
message
news:3oal931elporg4t6o0np71mgjs11m3u2kv@4a x.com...


With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John



As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.



Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.



Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry



Nice. That can digitize a slow charge and also nab a high-current
discharge, extending ESR measurments to smaller caps. To do it really
right, lead resistance will need to be removed, so the cap voltage has
to be (nearly) simultaneously sampled with the discharge current,
interleaved maybe, with more math!

What if you charge a cap to a known voltage and pulse-discharge it for
a bit, constant-current or constant-r, and measure the residual
voltage. That would also inferr ESR, but might suffer from dielectric
absorption errors.

Yup, something can definitely be done in the discharge path to improve
ESR resolution.

But as a practical matter, how much resolution is really
necessary?

Ed



"Resolution" in the sense of being able to resolve milliohms. We are
currently buying polymer aluminum electrolytic caps that have typical
ESRs in the 1-2 mohm range.

Ok - so then practical resolution would be in the tens or 100's
of micro-ohms, for accuracy in the units milliohms.

And there's a host of various LDOs,
integrated switchers, and homebrew power supplies around that care a
great deal about output cap ESR. The inverting switcher I posted to
this group cares a lot about cap esr; it needs low esr to kill output
ripple and high esr for loop stability, with, optimistically, some
workable compromise point in the middle.

Those were *great* pictures you posted. I've been enjoying
that discussion. :-)


ESR over temperature is an even nastier issue. I bet there's a lot of
electronics out there that will fail below 0C, as the caps change esr
and the regulator loops start to oscillate.

If all you want to do us spot bad filter caps in TV power supplies, a
simple 2-wire scalar impedance measurement, in the 1 ohm ballpark, is
all you need. But then, checking ripple with a scope is just as good.

Sometimes you need to dissassemble stuff just to get the probe in
there - and than you need to build a bunch of cables to connect the
disassembled mess just so you can see what happens when voltage is
applied. Ask me how I know. :-( I suppose techs who repair specific
gear already have the needed interconnecting cables. Anyway, an
esr "go - nogo meter" would be good for those situations to avoid
building the interconnects.


A true esr measurent instrument would be useful in design, and it may
as well perform some other functions while you're at it.

That makes sense, I just hope the thing doesn't get priced
out of reason or the design time prolonged too much.

Ed


John

Joerg wrote:
Or get a 16-bitter like the MSP430 with a HW multiplier. That ought to
do it.

The MSP430 has slow pin-toggle instructions, which bit me when trying
to do high-speed One-wire(tm) interface. Four cycles of a clock for
each half-cycle on the output :-(. Had to raise the internal clock
speed (a lot).

Clifford Heath.

On Sat, 21 Jul 2007 10:54:41 -0700, John Larkin
wrote:


"Resolution" in the sense of being able to resolve milliohms. We are
currently buying polymer aluminum electrolytic caps that have typical
ESRs in the 1-2 mohm range. And there's a host of various LDOs,
integrated switchers, and homebrew power supplies around that care a
great deal about output cap ESR. The inverting switcher I posted to
this group cares a lot about cap esr; it needs low esr to kill output
ripple and high esr for loop stability, with, optimistically, some
workable compromise point in the middle.

ESR over temperature is an even nastier issue. I bet there's a lot of
electronics out there that will fail below 0C, as the caps change esr
and the regulator loops start to oscillate.

Given the extremely low ESR of new polymer caps, perhaps now retired
Cyril Bateman was on the right track when he designed his Tan-Delta
meter since it doesn't rely on ESR alone in order to derive its
result.


If all you want to do us spot bad filter caps in TV power supplies, a
simple 2-wire scalar impedance measurement, in the 1 ohm ballpark, is
all you need. But then, checking ripple with a scope is just as good.
A true esr measurent instrument would be useful in design, and it may
as well perform some other functions while you're at it.



I agree that for most practical applications a simple analog or
digital instrument is all that is required, and there are plenty of
examples of these around already. Trying to incorporate several
additional functions may mean compromises which reduce the overall
performance and increase the cost.

Clifford Heath wrote:

Joerg wrote:

Or get a 16-bitter like the MSP430 with a HW multiplier. That ought to
do it.


The MSP430 has slow pin-toggle instructions, which bit me when trying
to do high-speed One-wire(tm) interface. Four cycles of a clock for
each half-cycle on the output :-(. Had to raise the internal clock
speed (a lot).


True, plus the code overhead gets to become a burden if you switch
faster than a few hundred kHz anyway. But in John's case that ought to do.

This pin toggle sluggishness and the scarcity of timers and CC registers
is what (so far) kept me from employing uCs in switch mode supplies. And
when I realized I had to do those discrete I figured I might as well do
the rest in discretes.

--
Regards, Joerg

http://www.analogconsultants.com

Joerg wrote:

This pin toggle sluggishness and the scarcity of timers and CC registers
is what (so far) kept me from employing uCs in switch mode supplies. And
when I realized I had to do those discrete I figured I might as well do
the rest in discretes.

I have found that PIC's with the ADC's and PWM cells do a beautiful job of
running a switching regulator. They can handle a whole bunch of other work
at the same time.

As an example, I used a single PIC to handle all of the functionality of
a NiCad rapid charger using the Christie burp charging algorithm. I used one
of the PIC's PWM cells to control a switching constant current regulator for
charging the cell, and another to control a switching constant current load
for performing the "burp". In addition, the PIC handled measuring the
voltages using its 10 bit ADC's, measuring a programming resistor in each
adapter cable/plug, tracking the charge profile, sensing bad cells, cell temperature,
etc. displaying charging state, and determining when the cell was fully charged.

The charger handled about 100 different batteries, and a variety of different
chemistries: Nicads, NiMH, LiION, SLA, silver zinc...

I was running the switching regulator/dump at 50KHz. It could have gone faster,
but I didn't see any point.

-Chuck

"Chuck Harris" wrote in message
...
Joerg wrote:

This pin toggle sluggishness and the scarcity of timers and CC registers
is what (so far) kept me from employing uCs in switch mode supplies. And
when I realized I had to do those discrete I figured I might as well do
the rest in discretes.

I have found that PIC's with the ADC's and PWM cells do a beautiful job of
running a switching regulator. They can handle a whole bunch of other
work
at the same time.

As an example, I used a single PIC to handle all of the functionality of
a NiCad rapid charger using the Christie burp charging algorithm. I used
one
of the PIC's PWM cells to control a switching constant current regulator
for
charging the cell, and another to control a switching constant current
load
for performing the "burp". In addition, the PIC handled measuring the
voltages using its 10 bit ADC's, measuring a programming resistor in each
adapter cable/plug, tracking the charge profile, sensing bad cells, cell
temperature,
etc. displaying charging state, and determining when the cell was fully
charged.

The charger handled about 100 different batteries, and a variety of
different
chemistries: Nicads, NiMH, LiION, SLA, silver zinc...

I was running the switching regulator/dump at 50KHz. It could have gone
faster,
but I didn't see any point.

-Chuck

Do you care to share your schematics and code Chuck?

Lord Garth wrote:
"Chuck Harris" wrote in message
...
Joerg wrote:

This pin toggle sluggishness and the scarcity of timers and CC registers
is what (so far) kept me from employing uCs in switch mode supplies. And
when I realized I had to do those discrete I figured I might as well do
the rest in discretes.
I have found that PIC's with the ADC's and PWM cells do a beautiful job of
running a switching regulator. They can handle a whole bunch of other
work
at the same time.

As an example, I used a single PIC to handle all of the functionality of
a NiCad rapid charger using the Christie burp charging algorithm. I used
one
of the PIC's PWM cells to control a switching constant current regulator
for
charging the cell, and another to control a switching constant current
load
for performing the "burp". In addition, the PIC handled measuring the
voltages using its 10 bit ADC's, measuring a programming resistor in each
adapter cable/plug, tracking the charge profile, sensing bad cells, cell
temperature,
etc. displaying charging state, and determining when the cell was fully
charged.
The charger handled about 100 different batteries, and a variety of
different
chemistries: Nicads, NiMH, LiION, SLA, silver zinc...

I was running the switching regulator/dump at 50KHz. It could have gone
faster,
but I didn't see any point.

-Chuck

Do you care to share your schematics and code Chuck?

You might be able to talk me into posting an earlier version that
did pretty much everything I said, but used an 8 bit ADC in a PIC16C73.

I did that one as a prototype for the US ARMY. It was a little brutal on
the LiION batteries, as 8 bits doesn't give you a whole lot of resolution
on your CV/CI regulator.

-Chuck