With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


--
Thanks,
- Win

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

On Sun, 15 Jul 2007 20:26:05 -0700, John Larkin
wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

Jack-of-all-trades and master-of-none ?:-)

I find universal instruments to be less than adequate.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

On Mon, 16 Jul 2007 07:15:36 -0700, Jim Thompson
wrote:

On Sun, 15 Jul 2007 20:26:05 -0700, John Larkin
wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:

John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.

John

Jack-of-all-trades and master-of-none ?:-)

I find universal instruments to be less than adequate.

...Jim Thompson


I'd sure like to have a good pcb trace short-finder, and if it did
big-C measurements and ESR, that would be nice too.

Oh, nobody else has noticed, so I note that my gadget wouldn't be
terribly useful at measuring inductance.

Analyze this!

John

On Mon, 16 Jul 2007 08:32:27 -0700, John Larkin
wrote:

[snip]

I'd sure like to have a good pcb trace short-finder, and if it did
big-C measurements and ESR, that would be nice too.

[snip]

John


I did one at GenRad about 30 years ago... just OpAmps with an AutoZero
loop around them, so that you can get µV equivalent offsets.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona Voice480)460-2350 | |
| E-mail Address at Website Fax480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

John Larkin wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:


John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.



Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....

Don't know what you'll be using for the SSR but how 'bout a big old FET?

--
Regards, Joerg

http://www.analogconsultants.com

On Mon, 16 Jul 2007 08:47:44 -0700, Joerg
wrote:

John Larkin wrote:

On 15 Jul 2007 18:26:20 -0700, Winfield Hill
wrote:


John Larkin wrote...

With some decent code, this could measure capacitance
(uF range, not pFs), true esr, resistance, millivolts,
possibly a useful range of inductances. It could find
shorted pcb traces and maybe plot diode curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find
objections, but I'd prefer improvements.

Hi John,
Consider some co-existing values: 1 to 50us measurement
intervals, 5 to 500uF capacitors, 5 to 100nH series and
probe inductances, and 5 milliohms esr. Tell us about
proposed current-switching speeds, diff amp bandwidth,
sampling rates and resolution. Run some numbers for us.



Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....


I was thinking I'd prefer a fast ADC, with fewer bits, so we could
take a lot of samples and do some waveform crunching. But an adc with
nasty stats wouldn't be good. I've been using some ADS7866's lately,
12 bits, SOT-23, SPI, and they work great.


Don't know what you'll be using for the SSR but how 'bout a big old FET?

We have some cheap 4-ohm ssr's in stock, so I just assumed them. I use
them a lot in signal switching situations. My tendency lately is to
minimize parts count more than parts cost, since it costs us 20 cents
or so to place a part. A fet would need gate drive stuff, unless we
feed the current source from the same voltage that powers the uP.

John

John Larkin wrote:

[...]


Given that a dinky uP is running things, I'd espect much slower
measurements, up into the 10s of milliseconds at least, with a bunch
of samples along the way. Say test currents from maybe 50 uA to maybe
100 mA, a 10 bit ADC (that would be a cheapie, probably internal to
the uP) stretched by some goodly averaging, maybe 1 volt fs at the
diffamp input, 1 mV at the adc. So an lsb is 10 mohm of resistance,
again stretchable a bit by averaging.

Neither current switch speeds nor diffamp bw would be important, given
the low sample rates; we'd have microseconds to spare.

I'd think you could measure caps from maybe 1 nF up to farads, but no
usable esr until the caps got up into the microfarad range.

More gain would be nice, if we were to do stuff like super-low esr or
pcb short tracking. With a big cap across the 9-volt battery, I
suppose you could pulse at 1 amp, and get 1 mohm, but even lower would
be nice. So variable gain, if it doesn't featurize and cost it out of
sight.

This was a first shot at an architecture.

It would be tempting to go whole-hog and do a real gadget that could
do things like wide-range diode curves and c-vs-v and stuff, but
that's not the issue here I guess.


Internal ADCs are typically rather noisy with no way of knowing what
mechanism is involved. I have seen hardcore noise that was
code-dependent, making it next to impossible to cure with the usual
averaging tricks. At least I'd spring for a cheap Codec. The one in my
newest laptop is 20 bits yet definitely not the latest and greatest. I
guess it was so cheap that they forgot to mention that it's more than
the usual 16 bits. But they also forgot to mention that there is a RS232
port ....



I was thinking I'd prefer a fast ADC, with fewer bits, so we could
take a lot of samples and do some waveform crunching. But an adc with
nasty stats wouldn't be good. I've been using some ADS7866's lately,
12 bits, SOT-23, SPI, and they work great.


I've used the AD7928 in a recent design. 8-ch 12-bits, very clean,
pleasantly surprised. The SPI didn't quite like to be handled per
datasheet, it wanted the opposite clock edge. Other than that AD sure
knows how to design quiet ADCs.


Don't know what you'll be using for the SSR but how 'bout a big old FET?


We have some cheap 4-ohm ssr's in stock, so I just assumed them. I use
them a lot in signal switching situations. My tendency lately is to
minimize parts count more than parts cost, since it costs us 20 cents
or so to place a part. A fet would need gate drive stuff, unless we
feed the current source from the same voltage that powers the uP.


20 cents? Ouch, that hurts. On my side that would require some
re-learning of design strategies ;-)

Does that 20c still apply once the stencil NRE is amortized?

--
Regards, Joerg

http://www.analogconsultants.com

On Sun, 15 Jul 2007 16:25:14 -0700, the renowned John Larkin
wrote:


With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

What's the purpose of the SSR, just to have two ranges of current
source? If so, it might be cheaper and more accurate to have two
sources in parallel.



Best regards,
Spehro Pefhany
--
"it's the network..." "The Journey is the reward"
Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com

On Sun, 15 Jul 2007 23:53:10 -0500, Spehro Pefhany
wrote:

On Sun, 15 Jul 2007 16:25:14 -0700, the renowned John Larkin
wrote:


With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John

What's the purpose of the SSR, just to have two ranges of current
source?

Yup.


If so, it might be cheaper and more accurate to have two
sources in parallel.

Think so? It would have to be calibrated anyhow. The ssr looked pretty
simple.


John

"John Larkin" wrote in message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.
With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.
Regards,
Harry

On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
.. .

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
. ..

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher
to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe 10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.
Extrapolating back the slope to get ESR sounds neat.
Not bitching, just trying to understand the master.
Cheers,
Harry

On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in message
.. .
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it even
looks like an AWG. I believe the main thrust of this project is to design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or higher
to
diminish the capacity effects from resistance. JL's meter is just too slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe 10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
. ..
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
m...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either apply
a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

Attached sketch allows much higher currents (10A) in the discharge mode and
both current and voltage slopes can be extraplated back to the switch
closure. Any clamping or leakage by the unit under test will be ignored.
Cheers,
Harry

Other possibilities;

Monitor V, I (or control one and watch the other) and sweep frequency; find
series resonance, ESR, ESL and C in one pass.

Run repeated sweeps and trigger the ADC at progressive points to get a
complete plot of relatively fast waveforms with a relatively slow ADC (I
forget what this method is called...um recurrent sweep?).

Tim

--
Deep Fryer: A very philosophical monk.
Website @ http://webpages.charter.net/dawill/tmoranwms

"John Larkin" wrote in message
...
On Mon, 16 Jul 2007 18:53:07 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
.. .
On Mon, 16 Jul 2007 13:11:46 -0700, "Harry Dellamano"
wrote:


"John Larkin" wrote in
message
...

With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

John


As JL points out this is a nice "sort of everything meter". To me it
even
looks like an AWG. I believe the main thrust of this project is to
design
a
ESR Meter with the best design trade offs to meet our testing needs. To
measure a wide range of ESR, hopefully to 1mR. If other applications
fall
out of the design then we have an even more viable product but we
should
initially focus on ESR.

With a wide range of series capacity in the DUT we need to either
apply a
fast current step, maybe 10uS or a continuous drive of 100KHz or
higher
to
diminish the capacity effects from resistance. JL's meter is just too
slow
for this task.

My numbers aren't bad.

Suppose you bang a 1 uF cap at 100 KHz. Its reactance is 1.6 ohms. So
a dumb impedance meter won't resolve even 2 ohms of esr worth squat.
Push F up, and sooner or later L will get you.

Suppose I dump 100 mA into 1 uF in 1 us or so. The voltage will rise
0.1 volts per usec, so I could squeeze off maybe 3 samples before the
adc rails. If I extrapolate the slope back, I'd expect to be able to
resolve maybe 0.2 ohms of esr, and simultaneously measure the
capacitance to a couple of percent for free. And I can do calibrations
and algorithms that no dumb analog circuit can do.

So quit bitching and draw something better.

John
In your initial response to Win in this thread you stated numbers like
50uA, 1nF and 20mS slope sampling times. That sounds slow but easily
attainable with the schematic shown. Now you state 100mA, 1uF and maybe
10uS
slope sample times. That is more in line with my above statement but you
schematic switching 100mA on in less than 1.0uS sounds difficult.

I think I mentioned that it wouldn't make esr measurements on
low-value caps. Neither would a 100 KHz impedance meter. Dumping 100
mA in 1 usec shouldn't be difficult. The 50 uA was the low end of the
current range, the sort of thing you'd use for low value caps or diode
curves.

Extrapolating back the slope to get ESR sounds neat.

If I can digitize the charging slope every 10 usec, I get a *lot* more
information than measuring the simple impedance with a square wave of
the same period. I can tease out the components.

Some repulsive algorithms and calibrations would be needed, but that's
what software is for, to do repulsive things.

Not bitching, just trying to understand the master.
Cheers,
Harry



As I said, this was a possible starting point for a group design.
Group design means people should help, play with ideas, offer
alternates, improve things. So far, only one original schematic has
been posted, mine, and all the reactions have been skeptical.

I've always thought s.e.d. should do a for-real group design.

C'mon guys, quit whinin' and start designin'

John

"John Larkin" wrote in
message
With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)


--

Reply in group, but if emailing add another
zero, and remove the last word.

"Tom Del Rosso" wrote in message
...


Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)


No, that's a P channel....

The arrow point in for an N channel.

"Lord Garth" wrote in message
. net
"Tom Del Rosso" wrote in message
...


Stupid question, but when the arrow is on the drain instead of the
gate, does "pointing out" mean N-channel? (Unless those are
IGBJTs...)


No, that's a P channel....

The arrow point in for an N channel.

Ok, the same as when the arrow is on the gate. Thanks.


--

Reply in group, but if emailing add another
zero, and remove the last word.

On Wed, 18 Jul 2007 14:22:07 -0400, "Tom Del Rosso"
wrote:

"John Larkin" wrote in
message
With some decent code, this could measure capacitance (uF range, not
pFs), true esr, resistance, millivolts, possibly a useful range of
inductances. It could find shorted pcb traces and maybe plot diode
curves.

The dac is optional, and the adc might be inside the uP.

This is a stage 0 brainstorm. Of course you can find objections, but
I'd prefer improvements.

Stupid question, but when the arrow is on the drain instead of the gate,
does "pointing out" mean N-channel? (Unless those are IGBJTs...)

It's an n-channel, and the arrow is the source. That's the way I draw
them. It makes a lot more sense to me, just an NPN transistor with an
insulated gate, with the arrow showing the direction of current flow.

John