On Wed, 30 Mar 2011 15:36:04 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
.. .


The drawings are attached and, BTW, where are those Google links you
keep praising?


By the time I've added the extra transistors I might just as well throw
together a 2 transistor astable with parts calulated to take the worst case
Vdd.

The 555 looked like an easy route to a minimalist design, if that turns out
not to be the case I have a fallback that will do at a pinch.
---
Good luck; you're gonna need it.

--
JF

flipper wrote:
On Wed, 30 Mar 2011 10:53:32 -0500, John Fields
On Wed, 30 Mar 2011 15:36:04 +0100, "Ian Field"
"John Fields" wrote in message

The drawings are attached and, BTW, where are those Google links you
keep praising?

By the time I've added the extra transistors I might just as well throw
together a 2 transistor astable with parts calulated to take the worst
case Vdd.

The 555 looked like an easy route to a minimalist design, if that turns
out not to be the case I have a fallback that will do at a pinch.
---
Good luck; you're gonna need it.

Told ya.

He wants someone to find an app note showing it's OK to run discharge
over Vcc so he can just stick a pull-up on it to drive the MOSFETs.

Nothing else is 'answering the question', and certainly not adding one
whooooooooole level shift transistor just to make it work.

I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.

But I guess he druthered be a poopy-head than accept the simplest, industry-
standard answer.

Thanks,
Rich

"Rich Grise" wrote in message
...
flipper wrote:
On Wed, 30 Mar 2011 10:53:32 -0500, John Fields
On Wed, 30 Mar 2011 15:36:04 +0100, "Ian Field"
"John Fields" wrote in message

The drawings are attached and, BTW, where are those Google links you
keep praising?

By the time I've added the extra transistors I might just as well throw
together a 2 transistor astable with parts calulated to take the worst
case Vdd.

The 555 looked like an easy route to a minimalist design, if that turns
out not to be the case I have a fallback that will do at a pinch.
---
Good luck; you're gonna need it.

Told ya.

He wants someone to find an app note showing it's OK to run discharge
over Vcc so he can just stick a pull-up on it to drive the MOSFETs.

Nothing else is 'answering the question', and certainly not adding one
whooooooooole level shift transistor just to make it work.

I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.


The only place it was fed back from the MOSFETs is in your little fantasy
world.

Does the planet you're on even have a sky?!

"flipper" wrote in message
...
On Wed, 30 Mar 2011 10:47:10 -0700, Rich Grise
wrote:

flipper wrote:
On Wed, 30 Mar 2011 10:53:32 -0500, John Fields
On Wed, 30 Mar 2011 15:36:04 +0100, "Ian Field"
"John Fields" wrote in message

The drawings are attached and, BTW, where are those Google links you
keep praising?

By the time I've added the extra transistors I might just as well throw
together a 2 transistor astable with parts calulated to take the worst
case Vdd.

The 555 looked like an easy route to a minimalist design, if that turns
out not to be the case I have a fallback that will do at a pinch.
---
Good luck; you're gonna need it.

Told ya.

He wants someone to find an app note showing it's OK to run discharge
over Vcc so he can just stick a pull-up on it to drive the MOSFETs.

Nothing else is 'answering the question', and certainly not adding one
whooooooooole level shift transistor just to make it work.

I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.

But I guess he druthered be a poopy-head than accept the simplest,
industry-
standard answer.

Thanks,
Rich

I don't know what you're talking about as I never saw any "feed back
from the output of the output MOSFETS."

The problem he's trying to get around is driving the gates with an
output (OUT) that can't go over Vcc so he swapped that with discharge
and hopes against the spec it won't burn up when he pulls that one
above Vcc.


Verbatim quote (Copy/paste):

"I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.".

So now you're twisting his words to make you look right!

On Wed, 30 Mar 2011 16:17:54 -0500, flipper wrote:

On Wed, 30 Mar 2011 21:32:59 +0100, "Ian Field"
wrote:


"flipper" wrote in message
. ..
On Wed, 30 Mar 2011 10:47:10 -0700, Rich Grise
wrote:

flipper wrote:
On Wed, 30 Mar 2011 10:53:32 -0500, John Fields
On Wed, 30 Mar 2011 15:36:04 +0100, "Ian Field"
"John Fields" wrote in message

The drawings are attached and, BTW, where are those Google links you
keep praising?

By the time I've added the extra transistors I might just as well throw
together a 2 transistor astable with parts calulated to take the worst
case Vdd.

The 555 looked like an easy route to a minimalist design, if that turns
out not to be the case I have a fallback that will do at a pinch.
---
Good luck; you're gonna need it.

Told ya.

He wants someone to find an app note showing it's OK to run discharge
over Vcc so he can just stick a pull-up on it to drive the MOSFETs.

Nothing else is 'answering the question', and certainly not adding one
whooooooooole level shift transistor just to make it work.

I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.

But I guess he druthered be a poopy-head than accept the simplest,
industry-
standard answer.

Thanks,
Rich

I don't know what you're talking about as I never saw any "feed back
from the output of the output MOSFETS."

The problem he's trying to get around is driving the gates with an
output (OUT) that can't go over Vcc so he swapped that with discharge
and hopes against the spec it won't burn up when he pulls that one
above Vcc.


Verbatim quote (Copy/paste):

"I already TRIED to give him the answer - don't feed back from the output
of the output MOSFETS; feed back from the GATES of the FETs, i.e. the
pin 3 output of the 555 itself.".

So now you're twisting his words to make you look right!

You'd make a good poster boy for nuts.

I didn't 'twist' a dern thing. I told him I had no idea what he was
talking about because I never saw anything resembling what he
described, which I QUOTED.

And YOUR reply to it was "The only place it was fed back from the
MOSFETs is in your little fantasy world."

Which would probably explain why I never saw it, Jackass.

One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:

On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
wrote:

snip


One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

I'm guessing, though, that as an IC designer you've got some insight
into that?


...Jim Thompson

Yes! But mums the word... might as well derive some pleasure by
watching an asshole heading for immolation ;-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

Jim Thompson wrote:

On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

I'm guessing, though, that as an IC designer you've got some insight
into that?

Yes! But mums the word... might as well derive some pleasure by
watching an asshole heading for immolation ;-)


Like a pint of turpentine on an inflamed hemorrhoid.


--
You can't fix stupid. You can't even put a Band-Aid™ on it, because it's
Teflon coated.

Ian Field wrote:

The only place it was fed back from the MOSFETs is in your little fantasy
world.

Then what, exactly, does this mean?

"Does anyone have any application examples of the 555 with the source/sink
O/P used to drive the timing resistor and the discharge transistor driving
the external load?

The project is a 555 pulse generator with a complementary pair MOSFET O/P
buffer, it will run from any wall wart over 12V that could potentially
exceed the 555 ABS-MAX Vcc, so the 555 will have a simple resistor/zener
regulator, the Vdd for the MOSFETs will be the full unregulated rail so the
source/sink output won't go high enough to cut off the P-channel MOSFET."

Thanks,
Rich

Ian Field wrote:

Worst case scenario for whatever wall-wart happens to be ready to
hand.

It's great to design for the possibility that the user will substitute the
wrong power supply, but then you have to take it to the limit and allow for
adapters with reverse polarity, AC output or a much higher voltage. So a
zener protecting only the 555 isn't enough for either the 555 or the MOSFET
pair. Either you have to use a better regulator or assume they will use the
right adapter.

Better protection would be to use an unusual connector, which many devices
do.


--

Reply in group, but if emailing add one more
zero, and remove the last word.

flipper wrote:

It means he started with wanting to use an NE555 to drive a push pull
MOSFET stage but the MOSFET supply is more than the NE555 Vcc rating.

So, he has to regulate down for the NE555 but now the 'normal' OUT
line, being a totem pole, can't go high enough to turn off the top P
MOSFET.

Well, that's a major DUH - just use an NPN on "out" or "disch" or whatever,
and let the NPN do the level shifting.

Why do these people insist on making these things so difficult?

Thanks,
Rich

On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:

On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
wrote:

snip


One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

---
If it's like most other ESD protection it's two diodes in series, with
the anode-cathode junction connected to the discharge pin, the free
cathode of one connected to Vcc, and the free anode of the other
connected to GND.

Easy enough to check with the diode function of a multimeter.

--
JF

"Tom Del Rosso" wrote in message
...

Ian Field wrote:

Worst case scenario for whatever wall-wart happens to be ready to
hand.

It's great to design for the possibility that the user will substitute the
wrong power supply, but then you have to take it to the limit and allow
for adapters with reverse polarity, AC output or a much higher voltage.


That can and does happen with bought appliances that originally came with
their own adapter.

These days I make a habit of labelling the wall warts so I know what
appliance they belong to - I doubt many other people do.

Basically any wall wart in the drawer without a label is fair game for
whatever project that's on the go.

"Rich Grise" wrote in message
...
flipper wrote:

It means he started with wanting to use an NE555 to drive a push pull
MOSFET stage but the MOSFET supply is more than the NE555 Vcc rating.

So, he has to regulate down for the NE555 but now the 'normal' OUT
line, being a totem pole, can't go high enough to turn off the top P
MOSFET.

Well, that's a major DUH - just use an NPN on "out" or "disch" or
whatever,
and let the NPN do the level shifting.

Why do these people insist on making these things so difficult?


That was my point exactly!!!

"flipper" wrote in message
...
On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
wrote:

snip


One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.


Quite likely on the CMOS 555 but then those have parsasitic thyristors that
cause latchup if (according to the datasheet) *ANY* pin is taken over Vcc.

Bipolar 555 - probably not, I'll find out when I get around to bench
testing.

On Thu, 31 Mar 2011 08:51:45 -0500, John Fields
wrote:

On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:

On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
wrote:

snip


One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

---
If it's like most other ESD protection it's two diodes in series, with
the anode-cathode junction connected to the discharge pin, the free
cathode of one connected to Vcc, and the free anode of the other
connected to GND.

Easy enough to check with the diode function of a multimeter.

Shhhhhhh! Don't sidetrack the immolation :-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

On Thu, 31 Mar 2011 11:36:41 -0500, flipper wrote:

On Thu, 31 Mar 2011 08:51:45 -0500, John Fields
wrote:

On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:

On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
wrote:

snip


One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

---
If it's like most other ESD protection it's two diodes in series, with
the anode-cathode junction connected to the discharge pin, the free
cathode of one connected to Vcc, and the free anode of the other
connected to GND.

Sure, I know "if it's like..."

I just wasn't going to declare something a 'fact' that isn't
specified.

Easy enough to check with the diode function of a multimeter.

This is like a 'second problem', though, because even if the diodes
aren't there it is still only rated to Vcc.

As a side note, the CMOS LMC555 datasheet is 'Ian ambiguity proof' in
that it explicitly states "Absolute Maximum" for output voltages Vo
and Vdis at 15V, in addition to the "Supply Voltage."

So Ian is ignorant because he can't read ?:-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

"John Fields" wrote in message
...
On Wed, 30 Mar 2011 15:37:29 +0100, "Ian Field"
wrote:


"Jim Thompson" wrote
in
message ...
On Tue, 29 Mar 2011 16:02:06 -0500, John Fields
wrote:

On Tue, 29 Mar 2011 20:13:19 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
om...
On Tue, 29 Mar 2011 18:15:02 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
news:m7u3p6phr9uogce5tfh2ljnsumf4qr6v94@4ax .com...
On Tue, 29 Mar 2011 15:11:08 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
news:9lm3p69o3lhoa043gm8cq01bk9i23aua1b@4 ax.com...
Speaking of loss, I responded to your question by designing what
you
said you wanted, setting it up to run on LTspice, and posting the
netlist a couple of times; Sunday being the last time.


I suspect some of the argumentative types are critiscising the idea
of
using
the open collector discharge transistor outside Vcc - I haven't
found
any
datasheets that explicitly indicate whether this is possible
either.

---
Don't you know how to read a schematic?

What the "argumentative types" are criticizing, re. using the
discharge transistor above Vcc, is irrelevant since my design
clearly
shows it pulled up to Vcc through 10k.


Vdd for the MOSFET complementary pair will be higher than Vcc - so
pulling
the transistor up to Vcc by *ANY* value resistor won't cut off the
P-channel
resulting in crowbarring Vdd during every O/P high period.

Looks like you don't know how to read plain English.

---
Ah, so you _don't_ know how to read a schematic!

Here, let me enlighten you:

First of all, referring to the bipolar pulse generator, notice that
Q3
is a PNP and Q4 is an NPN.

On the MOSFET version, notice that M2 is a P-channel MOSFET while M1
is N-channel.

That means that (on the bipolar version) both transistors will be
running common emitter, with the result that Q3 will be cut off and
Q4
will be in saturation when the bases of Q2 and Q5 go low, which
happens when U2-7 (the DISCHARGE pin of the 555) goes low.

Also, R6 will be pulled to ground through Q4 during that time,
sinking
current.

When U2-7 goes OC, however, Q2 and Q5 will be turned on and when that
happens, the collector of Q2 will be pulled low, turning on Q3, and
the collector of Q5 will go low, turning Q4 off.

Charge will now be sourced by Q3, so the output stage is essentially
a
totem pole which can either sink or source current.

Notice that the 555 is being driven as an astable with the timing cap
and resistor, R3C1, being driven by the output of the 555, which is
precisely what you asked for.

Also, the regulator you asked for comprises R2, D1, Q1, and C3 and
clamps Vcc to about 15V regardless (within reason) of the supply.

So there you have it; a pulse generator with a 50% duty cycle, a
regulator to keep the 555 safe, and a complementary output stage with
power being supplied by the main supply and control being supplied by
the 555's DISCHARGE pin .

Isn't that everything you asked for?


Sounds like a lot of stuff I didn't ask for and pretty vague on what I
did.

---
Really?

Here's your original post:

"Does anyone have any application examples of the 555 with the
source/sink O/P used to drive the timing resistor and the discharge
transistor driving the external load?

The project is a 555 pulse generator with a complementary pair MOSFET
O/P buffer, it will run from any wall wart over 12V that could
potentially exceed the 555 ABS-MAX Vcc, so the 555 will have a simple
resistor/Zener regulator, the Vdd for the MOSFETs will be the full
unregulated rail so the source/sink output won't go high enough to cut
off the P-channel MOSFET."

You asked for:

1. The 555's source-sink output to drive the timing resistor.
I gave you that.

2. The 555's discharge transistor to drive the external load.
I gave you that, the external load being the complementary pair
output buffer driven by a level-shifting transistor.

3. A complementary pair output buffer using the unregulated rail for
power.
I gave you that.

4. A simple regulator for the 555's Vcc.
I gave you that.

That's everything you asked for, and I think, implemented in the
simplest way possible.

If you disagree, what did I not give you that you asked for, or what
did I give you that you didn't ask for?

BTW, after rereading your original post, I'm confused in that at the
beginning of your post you want the load (ostensibly the MOSFET gates)
to be driven by the discharge pin, while at the end you seem to want
the source-sink output to do the job.

can you clarify what you meant, please?
---

Despite my not being sure where to look on google it produced the
answer
long before anyone here got anywhere close.

---
Dumb luck helps, doesn't it?
Why not post the relevant link(s)
---

I've got the answer from google and I'm getting extremely bored with
the
people here who want to bicker and split hairs.

---
So **** off, then, ******.

Ian is not only a ******* child, he's so profoundly ignorant I'm
beginning to think he's Slowman in drag.

He'll not post any links, he has none... he's so full of it his eyes
are brown.


You promised to killfile me - that makes you a liar.

---
His killfiling you doesn't mean that he can't read your responses in
my posts, so that makes you USENET ignorant as well.


Pretty spineless killfiling someone then continuing to hurl insults at them.

Walk upright under a snake etc.

On Thu, 31 Mar 2011 16:39:22 -0500, flipper wrote:

On Thu, 31 Mar 2011 18:57:52 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
. ..
On Wed, 30 Mar 2011 15:37:29 +0100, "Ian Field"
wrote:


"Jim Thompson" wrote
in
message ...
On Tue, 29 Mar 2011 16:02:06 -0500, John Fields
wrote:

On Tue, 29 Mar 2011 20:13:19 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
news:n674p6lc22t5cqj6bgbi3fek2entcrehck@4ax .com...
On Tue, 29 Mar 2011 18:15:02 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
news:m7u3p6phr9uogce5tfh2ljnsumf4qr6v94@4 ax.com...
On Tue, 29 Mar 2011 15:11:08 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
news:9lm3p69o3lhoa043gm8cq01bk9i23aua1b @4ax.com...
Speaking of loss, I responded to your question by designing what
you
said you wanted, setting it up to run on LTspice, and posting the
netlist a couple of times; Sunday being the last time.


I suspect some of the argumentative types are critiscising the idea
of
using
the open collector discharge transistor outside Vcc - I haven't
found
any
datasheets that explicitly indicate whether this is possible
either.

---
Don't you know how to read a schematic?

What the "argumentative types" are criticizing, re. using the
discharge transistor above Vcc, is irrelevant since my design
clearly
shows it pulled up to Vcc through 10k.


Vdd for the MOSFET complementary pair will be higher than Vcc - so
pulling
the transistor up to Vcc by *ANY* value resistor won't cut off the
P-channel
resulting in crowbarring Vdd during every O/P high period.

Looks like you don't know how to read plain English.

---
Ah, so you _don't_ know how to read a schematic!

Here, let me enlighten you:

First of all, referring to the bipolar pulse generator, notice that
Q3
is a PNP and Q4 is an NPN.

On the MOSFET version, notice that M2 is a P-channel MOSFET while M1
is N-channel.

That means that (on the bipolar version) both transistors will be
running common emitter, with the result that Q3 will be cut off and
Q4
will be in saturation when the bases of Q2 and Q5 go low, which
happens when U2-7 (the DISCHARGE pin of the 555) goes low.

Also, R6 will be pulled to ground through Q4 during that time,
sinking
current.

When U2-7 goes OC, however, Q2 and Q5 will be turned on and when that
happens, the collector of Q2 will be pulled low, turning on Q3, and
the collector of Q5 will go low, turning Q4 off.

Charge will now be sourced by Q3, so the output stage is essentially
a
totem pole which can either sink or source current.

Notice that the 555 is being driven as an astable with the timing cap
and resistor, R3C1, being driven by the output of the 555, which is
precisely what you asked for.

Also, the regulator you asked for comprises R2, D1, Q1, and C3 and
clamps Vcc to about 15V regardless (within reason) of the supply.

So there you have it; a pulse generator with a 50% duty cycle, a
regulator to keep the 555 safe, and a complementary output stage with
power being supplied by the main supply and control being supplied by
the 555's DISCHARGE pin .

Isn't that everything you asked for?


Sounds like a lot of stuff I didn't ask for and pretty vague on what I
did.

---
Really?

Here's your original post:

"Does anyone have any application examples of the 555 with the
source/sink O/P used to drive the timing resistor and the discharge
transistor driving the external load?

The project is a 555 pulse generator with a complementary pair MOSFET
O/P buffer, it will run from any wall wart over 12V that could
potentially exceed the 555 ABS-MAX Vcc, so the 555 will have a simple
resistor/Zener regulator, the Vdd for the MOSFETs will be the full
unregulated rail so the source/sink output won't go high enough to cut
off the P-channel MOSFET."

You asked for:

1. The 555's source-sink output to drive the timing resistor.
I gave you that.

2. The 555's discharge transistor to drive the external load.
I gave you that, the external load being the complementary pair
output buffer driven by a level-shifting transistor.

3. A complementary pair output buffer using the unregulated rail for
power.
I gave you that.

4. A simple regulator for the 555's Vcc.
I gave you that.

That's everything you asked for, and I think, implemented in the
simplest way possible.

If you disagree, what did I not give you that you asked for, or what
did I give you that you didn't ask for?

BTW, after rereading your original post, I'm confused in that at the
beginning of your post you want the load (ostensibly the MOSFET gates)
to be driven by the discharge pin, while at the end you seem to want
the source-sink output to do the job.

can you clarify what you meant, please?
---

Despite my not being sure where to look on google it produced the
answer
long before anyone here got anywhere close.

---
Dumb luck helps, doesn't it?
Why not post the relevant link(s)
---

I've got the answer from google and I'm getting extremely bored with
the
people here who want to bicker and split hairs.

---
So **** off, then, ******.

Ian is not only a ******* child, he's so profoundly ignorant I'm
beginning to think he's Slowman in drag.

He'll not post any links, he has none... he's so full of it his eyes
are brown.


You promised to killfile me - that makes you a liar.

---
His killfiling you doesn't mean that he can't read your responses in
my posts, so that makes you USENET ignorant as well.


Pretty spineless killfiling someone then continuing to hurl insults at them.

Walk upright under a snake etc.

No, it simply means you've demonstrated to his satisfaction that there
is no useful purpose served in reading your posts but that doesn't
mean he might not wish to commiserate with other victims.

You brought it upon yourself by incessantly insulting everyone who
tried to help and generally behaving as if you were auditioning for a
"World's Biggest Jackass" reality show.

You didn't hear? Ian won the extended level grand prize... "Most
Outstanding Jackass So Far This Century".

But it's now time for everyone to killfile Ian, and devote our
mentoring to those who will listen and learn.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

On Thu, 31 Mar 2011 18:57:52 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
.. .

On Wed, 30 Mar 2011 15:37:29 +0100, "Ian Field"
wrote:


"Jim Thompson" wrote:


He'll not post any links, he has none... he's so full of it his eyes
are brown.


You promised to killfile me - that makes you a liar.

---
His killfiling you doesn't mean that he can't read your responses in
my posts, so that makes you USENET ignorant as well.


Pretty spineless killfiling someone then continuing to hurl insults at them.

---
Notice that Jim's use of third person instead of second person
indicates that he is talking _about_ you to someone other than you
and, clearly, isn't then hurling insults _at_ you.
---

Walk upright under a snake etc.

---
PKB.

BTW, what did you mean by: "...all those extra transistors.", and
where are those links you claim you found on Google that will serve
your purpose?

--
JF

On Thu, 31 Mar 2011 17:17:34 -0500, John Fields
wrote:

On Thu, 31 Mar 2011 18:57:52 +0100, "Ian Field"
wrote:


"John Fields" wrote in message
. ..

On Wed, 30 Mar 2011 15:37:29 +0100, "Ian Field"
wrote:


"Jim Thompson" wrote:


He'll not post any links, he has none... he's so full of it his eyes
are brown.


You promised to killfile me - that makes you a liar.

---
His killfiling you doesn't mean that he can't read your responses in
my posts, so that makes you USENET ignorant as well.


Pretty spineless killfiling someone then continuing to hurl insults at them.

---
Notice that Jim's use of third person instead of second person
indicates that he is talking _about_ you to someone other than you
and, clearly, isn't then hurling insults _at_ you.

Oooooh! "Third person" That'll really blow Ian's mindless hollow
head ;-)

---

Walk upright under a snake etc.

---
PKB.

BTW, what did you mean by: "...all those extra transistors.", and
where are those links you claim you found on Google that will serve
your purpose?

Brown eyes :-P

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

Ian Field wrote:

Basically any wall wart in the drawer without a label is fair game for
whatever project that's on the go.


Then I'm about 500 projects behind.


--
You can't fix stupid. You can't even put a Band-Aid™ on it, because it's
Teflon coated.

flipper wrote:
On Thu, 31 Mar 2011 00:05:49 -0700, Rich Grise

Why do these people insist on making these things so difficult?

Because stomp foot, stomp foot, whine he wants to pull discharge
over Vcc to avoid the extravagant Rube Goldberg complexity of a
whoooooole transistor.

LOL! I mean literally, out loud! What a wonderful capper to an otherwise
very satisfying day of doing something productive - today I tracked down
a page from ASTM A 6/A 6M - 07, saving the company about 70 bucks, then
this afternoon I deburred, wire-wheeled, and primered two mongo parts.

Life is good, at least in the local microcosm. ;-)

Cheers!
Rich

flipper wrote:
On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
snip
One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

I'm guessing, though, that as an IC designer you've got some insight
into that?

AFAIK, bipolars have never worried about ESD, probably because the
most voltage they'll develop is a diode drop or a breakdown voltage
of a handful of volts; I wouldn't expect the breakdown to do much
damage because after all, how many joules are there in a typical
static discharge?

I _do_ take serious precautions with CMOS, however.

Personal anecdote: One time when I went to the Indian casino at
Mystic Lake, MN, I was feeling flush (Hey, I can afford to plunk
down a hundred bucks to play some blackjack!), so I took the car
to valet. When I got out of the car and handed my keys to the valet
(who, incidentally, was a very hot babe), we got a major static
spark. "Gawrsh, when we touched, it was like electricity!" She giggled
appropriately, and went to work. (parking my car, that is.) :-)

Cheers!
Rich

Rich

Jim Thompson wrote:
On Thu, 31 Mar 2011 11:36:41 -0500, flipper wrote:
On Thu, 31 Mar 2011 08:51:45 -0500, John Fields
On Wed, 30 Mar 2011 17:05:31 -0500, flipper wrote:
On Wed, 30 Mar 2011 15:00:58 -0700, Jim Thompson
snip
One can amuse one's self... how is the ESD configured on the Discharge
pin ?:-)

s/one's self/oneself/

Interesting question but the datasheets I've got don't mention a thing
about ESD protection so I don't know.

If it's like most other ESD protection it's two diodes in series, with
the anode-cathode junction connected to the discharge pin, the free
cathode of one connected to Vcc, and the free anode of the other
connected to GND.

Sure, I know "if it's like..."

I just wasn't going to declare something a 'fact' that isn't
specified.

Easy enough to check with the diode function of a multimeter.

This is like a 'second problem', though, because even if the diodes
aren't there it is still only rated to Vcc.

As a side note, the CMOS LMC555 datasheet is 'Ian ambiguity proof' in
that it explicitly states "Absolute Maximum" for output voltages Vo
and Vdis at 15V, in addition to the "Supply Voltage."

So Ian is ignorant because he can't read ?:-)

The two do tend to go hand-in-hand.

Cheers!
Rich

On Thu, 31 Mar 2011 16:21:51 -0700, Rich Grise
wrote:

flipper wrote:
On Thu, 31 Mar 2011 00:05:49 -0700, Rich Grise

Why do these people insist on making these things so difficult?

Because stomp foot, stomp foot, whine he wants to pull discharge
over Vcc to avoid the extravagant Rube Goldberg complexity of a
whoooooole transistor.

LOL! I mean literally, out loud! What a wonderful capper to an otherwise
very satisfying day of doing something productive - today I tracked down
a page from ASTM A 6/A 6M - 07, saving the company about 70 bucks, then
this afternoon I deburred, wire-wheeled, and primered two mongo parts.

Life is good, at least in the local microcosm. ;-)

---
Physical is nice, yes?

--
JF

On Thu, 31 Mar 2011 19:40:52 -0500, flipper wrote:

On Thu, 31 Mar 2011 16:32:31 -0700, Rich Grise
wrote:

[snip]

AFAIK, bipolars have never worried about ESD, probably because the
most voltage they'll develop is a diode drop or a breakdown voltage
of a handful of volts; I wouldn't expect the breakdown to do much
damage because after all, how many joules are there in a typical
static discharge?

That's my general understanding as well but, as the saying goes, you
never know and I thought Jim might have knowledge of some 'unique'
characteristic of the NE555.


[snip]

The NE555 may predate concerns with ESD, but the CMOS versions
certainly have a diode from _any_ pin to VCC.

My comments had more to do with breakdown in the bipolar version... I
observed that the impedance levels in the base circuit of the
discharge device were not conducive to expecting any more than the max
VCC rating.

But Ian didn't appreciate my blowing a hole is his asininity. Which
is, of course, delightful... he'll never be a designer :-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

Remember: Once you go over the hill, you pick up speed

On Thu, 31 Mar 2011 14:54:07 -0700, Jim Thompson
wrote:


But it's now time for everyone to killfile Ian, and devote our
mentoring to those who will listen and learn.

---
I disagree.

He posted a great datasheet link, and even though he seems to have an
ego which wrests with its inability to admit to error, exhibits
retaliatory humor.

In addition, he's willing to forego simulation and build circuitry in
the real world, just to prove a point.

How better to bring him into the fold than by elucidating his errors
incontrovertibly and allowing him to respond, than by killfiling him
and losing what seems to be a budding talent?

--
JF

flipper wrote:

I thought there for a second you were going to say it electrocuted
your 'CMOS' key fob.

Nah, it was a Ford Escort, which doesn't have an electronic key fob.

But, since you bring it up, how _do_ they deal with that? It might
not even be the seat of your pants sliding across the seat - cars
build up a static charge just from the tires on the pavement.

Thanks,
Rich

John Fields wrote:
On Thu, 31 Mar 2011 14:54:07 -0700, Jim Thompson

But it's now time for everyone to killfile Ian, and devote our
mentoring to those who will listen and learn.

I disagree.

He posted a great datasheet link, and even though he seems to have an
ego which wrests with its inability to admit to error, exhibits
retaliatory humor.

In addition, he's willing to forego simulation and build circuitry in
the real world, just to prove a point.

How better to bring him into the fold than by elucidating his errors
incontrovertibly and allowing him to respond, than by killfiling him
and losing what seems to be a budding talent?

Do you mean there are still people who don't know what a pompous ass
Thompson is?

Thanks,
Rich