hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

The components are ;
IC is an SOIC-16 Quad OP amp and most of other components are
0805 and sot-23.

It is a two layer board where (red) traces are top of PCB and the
(green) is the bottom.
I was trying to lay out everything so that it would be a single
sided board. That is why there is a distinct lack of through
holes (VIAs)

thanks for any help,
robb

"robb" ...
hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

I assume it will not be plated through. In that case make the connection
points for external wiring as big as you can (or anchor them with extra wide
traces). If not, the mechanical force from the wires will break the traces
loose.

Guess: continuity tester?

Arie

On Tue, 15 Jan 2008 23:17:32 -0500, "robb" wrote:

hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

The components are ;
IC is an SOIC-16 Quad OP amp and most of other components are
0805 and sot-23.

It is a two layer board where (red) traces are top of PCB and the
(green) is the bottom.
I was trying to lay out everything so that it would be a single
sided board. That is why there is a distinct lack of through
holes (VIAs)

thanks for any help,
robb


Well, it would make *me* happier if you used standard reference
designators. Q = transistor, D = diode, T = transformer, etc.

Incidentally, CR is archaic for diode, and DS for indicator lamp. We
call all diodes D, including LEDs, and all resistors are R.

The board looks fine. A couple things are a little unusual, like the
angled connection into R11-R12 and into R4-R5 and R13, but that's just
a matter of style.

John

"John Larkin" wrote in message
...
The board looks fine. A couple things are a little unusual, like the
angled connection into R11-R12 and into R4-R5 and R13, but that's just
a matter of style.

The R11-R12 connection has an angle less than 90 degrees on it, which
historically people would tell you not to do due to it being an etchant trap
and not etching very well. I haven't heard an actual PCB shop say that's a
problem for ages, although they're still handing out that "advice" at
seminars... at least the ones we had some techs go to last year. (They also
came back with the idea that, for about 20 signal lines that never move at
more than a MHz -- and only a few move at more than kHz -- they needed a 50
pin connector with a power or ground connection on EVERY other pin for the
sake of signal integrity/current return path loop minimization/etc. as well as
a 100nF cap from EACH ONE of those power pins to the respective ground pins.
:-( I made them get rid of the excess caps but let them keep their 50 pin
connector since we had the real estate and one battle was enough for one
day...)

robb wrote:
hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

The components are ;
IC is an SOIC-16 Quad OP amp and most of other components are
0805 and sot-23.

The IC looks like a quad opamp. I would put its bypass
capacitor as close to the chip as possible. It appears that
C1 and C2 in series perform this function. I think I would
bring the trance to pin 11 up under the chip and put C1 and
C2 closer to it.

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are?


--
Regards,

John Popelish

What are the vias that seem to go nowhere like on pin 1,2 of the IC?

What CAD did you use for the design?
What file system will you use to send out the board for fab (gerber
RS-274X)? I recently used APcircuits in Canada (I'm in NY, USA) for a
prototype job. They have a very nice client that is downloadable and guides
you through the spec and file setup process. See Apclient.zip:
http://www.apcircuits.com/resources/...downloads.html

Good general infomation here
http://www.apcircuits.com/resources/tr.html


"robb" wrote in message
...
hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

The components are ;
IC is an SOIC-16 Quad OP amp and most of other components are
0805 and sot-23.

It is a two layer board where (red) traces are top of PCB and the
(green) is the bottom.
I was trying to lay out everything so that it would be a single
sided board. That is why there is a distinct lack of through
holes (VIAs)

thanks for any help,
robb

"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?

The IC looks like a quad opamp. I would put its bypass
capacitor as close to the chip as possible. It appears that
C1 and C2 in series perform this function. I think I would
bring the trance to pin 11 up under the chip and put C1 and
C2 closer to it.

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

Thanks for the reply and help John.

I have made some modifications and i have added a schematic image
along with the pcb,

R9 athrough R12 are supposed to be a resistor ?bridge? so i
oriented then that way ?
thanks again,
robb

robb wrote:
"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?
The IC looks like a quad opamp. I would put its bypass
capacitor as close to the chip as possible. It appears that
C1 and C2 in series perform this function. I think I would
bring the trance to pin 11 up under the chip and put C1 and
C2 closer to it.

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

Thanks for the reply and help John.

I have made some modifications and i have added a schematic image
along with the pcb,


Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away. Also,
driving the center of C1/C2 directly can cause some grief. Most opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with the
individual opamp sections separated, not all in one big block. Else
you'll sit there a few years later "What on earth does this part here do?"

Pins 1 and 2 are connected in the layout but not on the schematic ...

--
Regards, Joerg

http://www.analogconsultants.com/

On Thu, 17 Jan 2008 11:35:45 -0800, Joerg
wrote:

robb wrote:


I have made some modifications and i have added a schematic image
along with the pcb,


Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away. Also,
driving the center of C1/C2 directly can cause some grief. Most opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with the
individual opamp sections separated, not all in one big block. Else
you'll sit there a few years later "What on earth does this part here do?"

Pins 1 and 2 are connected in the layout but not on the schematic ...

More schematic comments:

Perhaps there is a microscopic dot where the wire from pin 2 crosses
the wire from pin 1 to indicate a connection. It is bad practice to
make a 4-way connection like that, as it can easily be confused with a
simple non-connected crossing. It is better to stagger the
connections in one direction so that the connection is obvious.

It is a serious no-no to run wires through components, as you have
done in R5 and R18. C3 is especially bad, as the wire through the cap
looks like the symbol for a feedthrough capacitor which I'm sure is
not what was intended.

As Joerg said, drawing the op-amps using conventional op-amp symbols
rather than as the IC package will make the drawing much more
understandable (and paper is cheap - spread things out a bit.)


--
Peter Bennett, VE7CEI
peterbb4 (at) interchange.ubc.ca
GPS and NMEA info: http://vancouver-webpages.com/peter
Vancouver Power Squadron: http://vancouver.powersquadron.ca

"Joerg" wrote in message
. ..
robb wrote:
"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

I have made some modifications and i have added a schematic
image
along with the pcb,

Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp
but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away.
Also,
driving the center of C1/C2 directly can cause some grief. Most
opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with
the
individual opamp sections separated, not all in one big block.
Else
you'll sit there a few years later "What on earth does this
part here do?"

Pins 1 and 2 are connected in the layout but not on the
schematic ...
--
Regards, Joerg
http://www.analogconsultants.com/

Thanks for help Joerg,
The replies do not go to weeds, i am just a hobby/amateur, slow
and methodic. Plus going from 2 cm spacing to 1cm seems pretty
close to me ? also i did not realize that 1 uF was a considered
a large capacitive load.

The design of the circuit is not mine (obvious yes) i simply
re-drew a schematic i found on the web using a schematic tool so
that it would be easier to make the PCB layout using the
schematic software's NET tool that shows what components are
connected when you click their pads. I just select the components
from the component manager. IC1 is a standard Quad OPAMP from the
schematic app's component library.

So the original schematic i am using for my SMT/etch project is
here

http://www.qsl.net/iz7ath/web/02_bre..._esr/fig03.gif

when i want to fiure out what it does i can look at my print out
of the original

thanks again for the help and ideas,
robb

"Arie de Muynck" wrote in message
ll.nl...

"robb" ...
hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Any advice on how to improve or fix the problems with the
layout/design etc... ?

I assume it will not be plated through. In that case make the
connection
points for external wiring as big as you can (or anchor them
with extra wide
traces). If not, the mechanical force from the wires will break
the traces
loose.

Guess: continuity tester?

Arie


thanks for reply,
i increased the size of the through wires and made them vias so i
an anchor on bottom of board.

thanks for ideas,
robb

"John Larkin" wrote
in message ...
On Tue, 15 Jan 2008 23:17:32 -0500, "robb"
wrote:

hello,
This is the my 1st SMT pcb etching project board.

Is there anything horribly wrong with the layout of the
components and/or traces ?

Well, it would make *me* happier if you used standard reference
designators. Q = transistor, D = diode, T = transformer, etc.

Incidentally, CR is archaic for diode, and DS for indicator
lamp. We
call all diodes D, including LEDs, and all resistors are R.

The board looks fine. A couple things are a little unusual,
like the
angled connection into R11-R12 and into R4-R5 and R13, but
that's just
a matter of style.

John


Thanks John,
i have incorporated lots of changes suggested.
The software package used those designations but i changed them
to suit modern style.

robb

"Joel Koltner" wrote in message
...
"John Larkin"
wrote in message
...

The board looks fine. A couple things are a little unusual,
like the
angled connection into R11-R12 and into R4-R5 and R13, but
that's just
a matter of style.

The R11-R12 connection has an angle less than 90 degrees on it,
which
historically people would tell you not to do due to it being an
etchant trap
and not etching very well. I haven't heard an actual PCB shop
say that's a
problem for ages, although they're still handing out that
"advice" at
seminars...

thanks for help,
robb

"Joerg" wrote in message
. ..
[trim]

Still no bypass cap close by. This is not a super-fast opamp
but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away.
Also,
driving the center of C1/C2 directly can cause some grief. Most
opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with
the
individual opamp sections separated, not all in one big block.
Else
you'll sit there a few years later "What on earth does this
part here do?"

Pins 1 and 2 are connected in the layout but not on the
schematic ...
--
Regards, Joerg
http://www.analogconsultants.com/

Thanks for help,

I made some changes to accomodate the helpful advice. will this
addition cause any problems to the circuit ?

Also i do not know how one would fix the capacitive load to
preven oscillation ? The only solution i recall for these
oscillation prolems is adding a capacitor ? hopefully my addition
of small cap across opamp will solve both problems ?

thanks agian for the help.
i do appreciate the advice here in a.b.s.e and other news
groups,

robb

robb wrote:

Also i do not know how one would fix the capacitive load to
preven oscillation ? The only solution i recall for these
oscillation prolems is adding a capacitor ? hopefully my addition
of small cap across opamp will solve both problems ?

If it was my board, I would add provision for a resistor
between the opamp output and the pair of capacitors so that
I could try adding a 10 to 47 ohm resistor. If it works
without any, you just jump that component.

Then run the ground buss directly from the capacitors, not
from the opamp output. It won't be a stiff, but then, the
battery is not a stiff voltage source, either.

Unfortunately, this is not the only circuit weakness, but
you seem intent on getting something built, rather than
refining the circuit, first. For instance, I think it is
might be quite practical to eliminate the ground bus half
way between +4.5 and -4.5 volts rails, all together. Most
of the circuit is only using the +4.5 to ground part of the
battery voltage, and the ground reference generator has to
waste the other half by absorbing their currents.
The capacitors connected directly to an opamp output is the
first clue that the designer has not finished thinking the
circuit through.

--
Regards,

John Popelish

robb wrote:
"Joerg" wrote in message
. ..
robb wrote:
"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

I have made some modifications and i have added a schematic
image
along with the pcb,

Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp
but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away.
Also,
driving the center of C1/C2 directly can cause some grief. Most
opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with
the
individual opamp sections separated, not all in one big block.
Else
you'll sit there a few years later "What on earth does this
part here do?"
Pins 1 and 2 are connected in the layout but not on the
schematic ...
--
Regards, Joerg
http://www.analogconsultants.com/

Thanks for help Joerg,
The replies do not go to weeds, i am just a hobby/amateur, slow
and methodic. Plus going from 2 cm spacing to 1cm seems pretty
close to me ? also i did not realize that 1 uF was a considered
a large capacitive load.

The design of the circuit is not mine (obvious yes) i simply
re-drew a schematic i found on the web using a schematic tool so
that it would be easier to make the PCB layout using the
schematic software's NET tool that shows what components are
connected when you click their pads. I just select the components
from the component manager. IC1 is a standard Quad OPAMP from the
schematic app's component library.

So the original schematic i am using for my SMT/etch project is
here

http://www.qsl.net/iz7ath/web/02_bre..._esr/fig03.gif

when i want to fiure out what it does i can look at my print out
of the original

thanks again for the help and ideas,
robb


Massa fittizia sounds so much nicer than virtual ground but that load on
IC1A definitely does not look ok. Figure 15 shows how to do it right:

http://www.ee.unb.ca/Courses/EE3122/...plications.pdf

--
Regards, Joerg

http://www.analogconsultants.com/

"John Popelish" wrote in message
...
robb wrote:

Also i do not know how one would fix the capacitive load to
preven oscillation ? The only solution i recall for these
oscillation prolems is adding a capacitor ? hopefully my
addition
of small cap across opamp will solve both problems ?


Thanks for John,


If it was my board, I would add provision for a resistor
between the opamp output and the pair of capacitors so that
I could try adding a 10 to 47 ohm resistor. If it works
without any, you just jump that component

Then run the ground buss directly from the capacitors, not
from the opamp output. It won't be a stiff, but then, the
battery is not a stiff voltage source, either.

easy enough for me, will do,

Unfortunately, this is not the only circuit weakness, but
you seem intent on getting something built, rather than
refining the circuit, first.


yes, you are correct.
This was originally meant to be an SMT PCB etch and build
project.
This was one of the ?better ?(free) ESR schematics i could find
on the net.

*but* i am not opposed to learning something ... this just seems
a little heavy for an amature hobbyist.

To do some learning i suppose i would first try to understand
exactly what ESR is technically ? (besides an indicator of
capacitor health)
Then study how ESR could/would be measured by some circuit.
Then i would read up on OpAmps what they do and how they work,
maybe build some simple OpAmp circuits, change things watch input
vs outputs on a scope/meter/etc.
Then i would study each individual block of the Quad OpAmp in
this ESR schematic to understand how and what each piece does
individually.
Then maybe i could go on to understanding how those pieces work
to gether to solve the original problem (how a circuit would
measure ESR). and so on

and i would love to do all that but "tai-yai-E-yime is not on my
side"

I still struggle with resistors, capacitors and transistors
and i do a mind bend into some fluid or hydraulic translation
like ...
Resistors are constrictors with pressure and flow tolerances
Capacitors are surge tanks with pressure (charge) , flow and
surge volume tolerances
Diodes are one way check valves
etc....

For instance, I think it
might be quite practical to eliminate the ground bus half
way between +4.5 and -4.5 volts rails, all together. Most
of the circuit is only using the +4.5 to ground part of the
battery voltage, and the ground reference generator has to
waste the other half by absorbing their currents.
The capacitors connected directly to an opamp output is the
first clue that the designer has not finished thinking the
circuit through.


So it really is not that great an ESR schematic then ?

Well i really wanted to build something good and would rather not
build a crappy ESR.

Then I am dropping back and will read through comments made. I
will probably re-draw schematic in OpAmp block form as in the
original schematic then figure out what the pieces are doing by
reading through the OpAmp application notes Joerg pointed to etc
etc etc....


Thanks for the help John.
I hope some of you experts are going to be around when i ask
"what for is a resistor ?" and other such basic questions.

robb

"Joerg" wrote in message
...

Massa fittizia sounds so much nicer than virtual ground but
that load on
IC1A definitely does not look ok. Figure 15 shows how to do it
right:


http://www.ee.unb.ca/Courses/EE3122/...plications.pdf

--
Regards, Joerg
http://www.analogconsultants.com/


Thanks Joerg,
Looks like i have some studying to do :|
robb

robb wrote:
"John Popelish" wrote in message
...
robb wrote:

Also i do not know how one would fix the capacitive load to
preven oscillation ? The only solution i recall for these
oscillation prolems is adding a capacitor ? hopefully my
addition
of small cap across opamp will solve both problems ?

Thanks for John,

If it was my board, I would add provision for a resistor
between the opamp output and the pair of capacitors so that
I could try adding a 10 to 47 ohm resistor. If it works
without any, you just jump that component

Then run the ground buss directly from the capacitors, not
from the opamp output. It won't be a stiff, but then, the
battery is not a stiff voltage source, either.

easy enough for me, will do,
Unfortunately, this is not the only circuit weakness, but
you seem intent on getting something built, rather than
refining the circuit, first.


yes, you are correct.
This was originally meant to be an SMT PCB etch and build
project.
This was one of the ?better ?(free) ESR schematics i could find
on the net.

*but* i am not opposed to learning something ... this just seems
a little heavy for an amature hobbyist.

To do some learning i suppose i would first try to understand
exactly what ESR is technically ? (besides an indicator of
capacitor health)
Then study how ESR could/would be measured by some circuit.
Then i would read up on OpAmps what they do and how they work,
maybe build some simple OpAmp circuits, change things watch input
vs outputs on a scope/meter/etc.
Then i would study each individual block of the Quad OpAmp in
this ESR schematic to understand how and what each piece does
individually.
Then maybe i could go on to understanding how those pieces work
to gether to solve the original problem (how a circuit would
measure ESR). and so on

and i would love to do all that but "tai-yai-E-yime is not on my
side"

I still struggle with resistors, capacitors and transistors
and i do a mind bend into some fluid or hydraulic translation
like ...
Resistors are constrictors with pressure and flow tolerances
Capacitors are surge tanks with pressure (charge) , flow and
surge volume tolerances
Diodes are one way check valves
etc....

For instance, I think it
might be quite practical to eliminate the ground bus half
way between +4.5 and -4.5 volts rails, all together. Most
of the circuit is only using the +4.5 to ground part of the
battery voltage, and the ground reference generator has to
waste the other half by absorbing their currents.
The capacitors connected directly to an opamp output is the
first clue that the designer has not finished thinking the
circuit through.


So it really is not that great an ESR schematic then ?


To be honest I don't think it's all that helpful. ESR is not constant
with frequency so ideally you would have to be able to measure that
using a (powerful) generator that modulates a DC source.

I have seen cases where capacitors blew up and people told me "but the
ESR data looked ok". Well, it was, just not at the frequency they were
using.

--
Regards, Joerg

http://www.analogconsultants.com/

flipper wrote:
On Fri, 18 Jan 2008 11:02:52 -0800, Joerg
wrote:

robb wrote:
"Joerg" wrote in message
. ..
robb wrote:
"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

I have made some modifications and i have added a schematic
image
along with the pcb,

Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp
but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away.
Also,
driving the center of C1/C2 directly can cause some grief. Most
opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with
the
individual opamp sections separated, not all in one big block.
Else
you'll sit there a few years later "What on earth does this
part here do?"
Pins 1 and 2 are connected in the layout but not on the
schematic ...
--
Regards, Joerg
http://www.analogconsultants.com/
Thanks for help Joerg,
The replies do not go to weeds, i am just a hobby/amateur, slow
and methodic. Plus going from 2 cm spacing to 1cm seems pretty
close to me ? also i did not realize that 1 uF was a considered
a large capacitive load.

The design of the circuit is not mine (obvious yes) i simply
re-drew a schematic i found on the web using a schematic tool so
that it would be easier to make the PCB layout using the
schematic software's NET tool that shows what components are
connected when you click their pads. I just select the components
from the component manager. IC1 is a standard Quad OPAMP from the
schematic app's component library.

So the original schematic i am using for my SMT/etch project is
here

http://www.qsl.net/iz7ath/web/02_bre..._esr/fig03.gif

when i want to fiure out what it does i can look at my print out
of the original

thanks again for the help and ideas,
robb

Massa fittizia sounds so much nicer than virtual ground but that load on
IC1A definitely does not look ok. Figure 15 shows how to do it right:

http://www.ee.unb.ca/Courses/EE3122/...plications.pdf

IC1A is already at unity gain.


That doesn't necessarily guarantee that it won't misbehave with such a
massive capacitive load. I would not do it.

--
Regards, Joerg

http://www.analogconsultants.com/

flipper wrote:
On Fri, 18 Jan 2008 13:15:10 -0800, Joerg
wrote:

flipper wrote:
On Fri, 18 Jan 2008 11:02:52 -0800, Joerg
wrote:

robb wrote:
"Joerg" wrote in message
. ..
robb wrote:
"John Popelish" wrote in message
. ..
robb wrote
This is the my 1st SMT pcb etching project board.
Is there anything horribly wrong with the layout of the
components and/or traces ?

I am also concerned that it looks like you have loaded the
output of one of the opamps directly with capacitors, which
tends to make them oscillate. And one opamp looks dangling.
Usually a bad idea. Maybe we should look at the
schematic, also.

Why are R9 through 12 arranges as they are
Regards,John Popelish

I have made some modifications and i have added a schematic
image
along with the pcb,

Hmm, first reply went into the weeds.

Still no bypass cap close by. This is not a super-fast opamp
but it is
isn't slow enough to go sans cap. C1/C2 are a bit far away.
Also,
driving the center of C1/C2 directly can cause some grief. Most
opamps
do not like to have a large capacitive load and may oscillate.

Hint: To make your circuits more understandable draw them with
the
individual opamp sections separated, not all in one big block.
Else
you'll sit there a few years later "What on earth does this
part here do?"
Pins 1 and 2 are connected in the layout but not on the
schematic ...
--
Regards, Joerg
http://www.analogconsultants.com/
Thanks for help Joerg,
The replies do not go to weeds, i am just a hobby/amateur, slow
and methodic. Plus going from 2 cm spacing to 1cm seems pretty
close to me ? also i did not realize that 1 uF was a considered
a large capacitive load.

The design of the circuit is not mine (obvious yes) i simply
re-drew a schematic i found on the web using a schematic tool so
that it would be easier to make the PCB layout using the
schematic software's NET tool that shows what components are
connected when you click their pads. I just select the components
from the component manager. IC1 is a standard Quad OPAMP from the
schematic app's component library.

So the original schematic i am using for my SMT/etch project is
here

http://www.qsl.net/iz7ath/web/02_bre..._esr/fig03.gif

when i want to fiure out what it does i can look at my print out
of the original

thanks again for the help and ideas,
robb

Massa fittizia sounds so much nicer than virtual ground but that load on
IC1A definitely does not look ok. Figure 15 shows how to do it right:

http://www.ee.unb.ca/Courses/EE3122/...plications.pdf
IC1A is already at unity gain.

That doesn't necessarily guarantee that it won't misbehave with such a
massive capacitive load. I would not do it.

I understand how you feel, and it makes me nervous too, but the point
was that circuit example isn't applicable. There's no gain to roll off
and the best C1 could do is bring gain down to what it already is.


Well, I have seen amps that were unity gain stable go into a tarantella
dance when presented with a big enough capacitive load.


Strikes me that huge caps on the output is the wrong place to
'filter'. What I usually see for virtual ground is filter the input
power and take it (VG) directly from the opamp with, perhaps, a
current limiting/capacitive load stability series resistor (in the
loop) and a few puffs for noise/stability.


A big cap across the output can also be a sure-fire method to fry the
output section of the opamp upon connection of a nice fresh battery.
Phssst ... pop ... poof.

--
Regards, Joerg

http://www.analogconsultants.com/

robb wrote:
"John Popelish" wrote in message
...

If it was my board, I would add provision for a resistor
between the opamp output and the pair of capacitors so that
I could try adding a 10 to 47 ohm resistor. If it works
without any, you just jump that component

Then run the ground buss directly from the capacitors, not
from the opamp output. It won't be a stiff, but then, the
battery is not a stiff voltage source, either.

easy enough for me, will do,
Unfortunately, this is not the only circuit weakness, but
you seem intent on getting something built, rather than
refining the circuit, first.


yes, you are correct.
This was originally meant to be an SMT PCB etch and build
project.
This was one of the ?better ?(free) ESR schematics i could find
on the net.

*but* i am not opposed to learning something ... this just seems
a little heavy for an amature hobbyist.

If you are making just one (not going into production), you
might just as well complete this one, if only to compare its
performance to some future improved version.

To do some learning i suppose i would first try to understand
exactly what ESR is technically ? (besides an indicator of
capacitor health)
Then study how ESR could/would be measured by some circuit.
Then i would read up on OpAmps what they do and how they work,
maybe build some simple OpAmp circuits, change things watch input
vs outputs on a scope/meter/etc.
Then i would study each individual block of the Quad OpAmp in
this ESR schematic to understand how and what each piece does
individually.
Then maybe i could go on to understanding how those pieces work
to gether to solve the original problem (how a circuit would
measure ESR). and so on

and i would love to do all that but "tai-yai-E-yime is not on my
side"

I still struggle with resistors, capacitors and transistors
and i do a mind bend into some fluid or hydraulic translation
like ...
Resistors are constrictors with pressure and flow tolerances
Capacitors are surge tanks with pressure (charge) , flow and
surge volume tolerances
Diodes are one way check valves
etc....

For instance, I think it
might be quite practical to eliminate the ground bus half
way between +4.5 and -4.5 volts rails, all together. Most
of the circuit is only using the +4.5 to ground part of the
battery voltage, and the ground reference generator has to
waste the other half by absorbing their currents.
The capacitors connected directly to an opamp output is the
first clue that the designer has not finished thinking the
circuit through.


So it really is not that great an ESR schematic then ?

Well i really wanted to build something good and would rather not
build a crappy ESR.

Then I am dropping back and will read through comments made. I
will probably re-draw schematic in OpAmp block form as in the
original schematic then figure out what the pieces are doing by
reading through the OpAmp application notes Joerg pointed to etc
etc etc....


Thanks for the help John.
I hope some of you experts are going to be around when i ask
"what for is a resistor ?" and other such basic questions.

Bring you questions to sci.electronics.basics and we can
dive into the circuit from the bits and pieces.

It will be easier than you think. The circuit breaks down
into functional blocks, pretty simply.

--
Regards,

John Popelish

robb wrote:

snip



So it really is not that great an ESR schematic then ?

No, it *is* a great ESR meter schematic, for what it is
intended to be. It is something a hobbyist can put together
for a few dollars that will work for most of the hobbyist level
usage it is likely to see. It is great for that.

It is not a laboratory instrument. More advanced hobbyists
may insist on more advanced instruments. That's fine for
them.

Put the thing together, and enjoy. It will serve you well
until your experience/understanding/usage/whatever grows
beyond what the meter can do.

If somone has a better approach and a better schematic that
matches your present construction ability, and is as
inexpensive, then go for that schematic instead of the one
you are working on now.



Well i really wanted to build something good and would rather not
build a crappy ESR.

It is not crappy. You will not waste a penny of your
investment in it, nor will the time and effort you
put in be mis-spent. If nothing else, it is a good
learning experience, but it is far more than that.
You get a meter that will locate bad capacitors, give you
an introduction to the idea of esr value, give you some
interesting sub circuits to learn about and could save
you money and time in repairing equipment, if you are
into that.

Ed


Then I am dropping back and will read through comments made. I
will probably re-draw schematic in OpAmp block form as in the
original schematic then figure out what the pieces are doing by
reading through the OpAmp application notes Joerg pointed to etc
etc etc....


Thanks for the help John.
I hope some of you experts are going to be around when i ask
"what for is a resistor ?" and other such basic questions.

robb