Here's how it works:

First, there are two modes of operation: daylight mode, which is
entered if the mains failure occurs during the day, and night mode, if
the failure occurs at night.

U1 is a 7555 timer configured as an astable multivibrator, and it
generates 1MHz square waves used as clocks for the simulation; in real
life it would output 1Hz clocks.

S1 and S2 simulate a mains operated form "C" (SPDT) relay with the NC
contact connected to GND and the NO contact connected to +12. Thus,
when the mains is hot, the NO contact will made, forcing RST high and
resetting the circuit. If the mains should fail, however, the
armature will be released and the NO contact will be made, forcing RST
low and de-asserting the reset.

Assuming daylight mode, U5+ will have gone more positive than U5-,
forcing U5's output and U6A's PREset input high, which will also force
U6A-Q, U6B-D, and one of U3D's inputs high.

In the meantime, RST's having been high had disabled U2 by keeping it
in reset mode, but RST's going low when the mains failed forced U2 out
of reset, allowing it to count up.

U2 is used as a 2 hour timer for this application, and by accumulating
1 second clocks from U1, will reach 2 hours when it counts up to 7200.

7200 in Hexadecimal is 1C20, which in binary is 0001 1100 0010 0000.

U2 is a 14 stage ripple counter, and its outputs map to binary 7200
like this:

Q14 Q13 Q12 Q11 Q10 Q09 Q08 Q07 Q06 Q05 Q04 Q01

0 1 1 1 0 0 0 0 1 0 0 0 .

That means that when the count has reached 7200, Q13,Q12,Q11, and Q6
will be high and all the other outputs will be low.

U3A, U3B, and U3C are used to decode the output data from the counter,
with the output of U3C going high when the count reaches 7200.

When that happens,the output of U4C will go low, forcing U1 into reset
and stopping the clocks.

Also, remembering that we're working in daylight mode and that since
U6B-D is being held high, when U3C goes high it'll be used as the
clock input of U6B which will force U6B-Qbar permanently low until the
mains is restored and RST is once again asserted.

The falling edge of U6B-Qbar is differentiated by C3 and used as a
low-going trigger for U7, a 7555 timer used as a one-shot to provide
an output to the dialer.


In night mode, RST will go low when a mains failure occurs, but U5's
output will be low because no light has yet been detected.

RST going low at one of U4B's inputs forces U2's reset input low,
allowing U2 to count. as before, U2 will count up to 7200, but since
it's dark out we want to postpone the output to the dialer for 2 hours
after first light.

To do so, the counter's output is again decoded at 7200 clocks,
inverted by U4C, and sent to U1's reset input which will stop the
clock.

The circuit will remain in this condition until first light is
detected and U6A-Q goes high.

Since stopping the clock has kept the counter's outputs at 7200
binary, U3C's output will remain high and U6A-Q going high will cause
U3D to go high. That high-going edge will be differentiated by C1 and
used to reset U2.

When that happens, U3C's outputs will all go low, as will the output
of the decoder, forcing U4C's output high, enabling U1, allowing it to
start making clocks.

U2 will now start counting clocks again and when it gets to 7200 will
cause U1 to be reset, stopping the clocks, and also sent to the clock
input of U6B.

Now, since U6A-Q is high because first light has been detected, when
the clock input of U6B goes high U6B-Qbar will go high, triggering U7
and providing an output for the dialer.

So, in summary:

Daylight mode causes the counter to count to 7200 once and then
trigger the one-shot.

Daylight night mode causes the counter to count to 7200, then freeze
until first light is detected when it'll be reset and will count to
7200 again before triggering the one-shot.

--
JF