Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

On Wed, 05 May 2010 06:12:13 -0400, JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

It used to be that all pre-production computers were built that way...
I like how he used PDP-11 switches on his front console.

On Wed, 05 May 2010 08:24:11 -0400, PeterD wrote:

On Wed, 05 May 2010 06:12:13 -0400, JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

It used to be that all pre-production computers were built that way...
I like how he used PDP-11 switches on his front console.

The PDP-11/20 was all MSI TTL, about 520 chips on two big boards. No
microcode, just a lot of messy logic.

I designed a CPU once, about a square foot of MSI logic. It had 4
instructions, a 4-deep hardware return-address stack, and a 20 KHz
4-phase clock. Worked fine as a shipboard bell logger.

John

On Wed, 05 May 2010 06:12:13 -0400, JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

Wow, it's classic clocks-all-over-the-place hairball logic, like DEC's
early stuff. He even uses delay lines!

John

"JW" wrote in message
...
Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

Geez! I'm getting flashbacks to 1974 when I worked as a tech for a Mil
contractor on a digital sonar processing set. Three 19" rack panels each
with 20 boards having about 30 ssi and msi TTL devices per board. Prototypes
were all wire-wrapped.

My life got much easier when the Intel 8008 came along...

Oppie

In article ,
JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Been there, done that mostly with RTL (tho not with a 100th of
the elegance or functionality of the M-1). The memory was a very
expensive (for me) pair of 256 BIT TTL chips*arranged*to give 4
pages of 16-8 bit words each. Each memory chip cost $25, about 10
times the cost of the next most expensive chip in the machine.

Programming was thru a bank of toggle switches arranged as 8-8
bit words. Architecture was 8 bit words with a 1 bit (serial) ALU
homebrewed from a dual half adder (probably the most complicated
chip in the machine). Clock speed was anything from 1/2Hz to
about 1.25MHz.

A great learning experience in 1971-2. (My day job was designing
the electrical system for a nuke plant.)

I still have it. Firing it up would probably take on a literal
meaning. ;-)

Kudos to the M-1's builder.

--
Fred Lotte

On Wed, 05 May 2010 08:42:23 -0700, John Larkin
wrote:

On Wed, 05 May 2010 06:12:13 -0400, JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Wonder how long it would take to wire-wrap that?

Wow, it's classic clocks-all-over-the-place hairball logic, like DEC's
early stuff. He even uses delay lines!

John

Time of arrival is an important issue in "slow logic world".

On Wed, 05 May 2010 19:27:34 -0400, Fred Lotte
wrote:

In article ,
JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Been there, done that mostly with RTL (tho not with a 100th of
the elegance or functionality of the M-1). The memory was a very
expensive (for me) pair of 256 BIT TTL chips*arranged*to give 4
pages of 16-8 bit words each. Each memory chip cost $25, about 10
times the cost of the next most expensive chip in the machine.

Programming was thru a bank of toggle switches arranged as 8-8
bit words. Architecture was 8 bit words with a 1 bit (serial) ALU
homebrewed from a dual half adder (probably the most complicated
chip in the machine). Clock speed was anything from 1/2Hz to
about 1.25MHz.

A great learning experience in 1971-2. (My day job was designing
the electrical system for a nuke plant.)

I still have it. Firing it up would probably take on a literal
meaning. ;-)

Kudos to the M-1's builder.


Do not use TFE wire in a Nuclear power plant. That insulation turns to
a powder around that particular radiation.

"Archimedes' Lever" wrote in message
news
On Wed, 05 May 2010 19:27:34 -0400, Fred Lotte
wrote:

In article ,
JW wrote:

Build a CPU with TTL chips
http://www.homebrewcpu.com/

Been there, done that mostly with RTL (tho not with a 100th of
the elegance or functionality of the M-1). The memory was a very
expensive (for me) pair of 256 BIT TTL chips arranged to give 4
pages of 16-8 bit words each. Each memory chip cost $25, about 10
times the cost of the next most expensive chip in the machine.

Programming was thru a bank of toggle switches arranged as 8-8
bit words. Architecture was 8 bit words with a 1 bit (serial) ALU
homebrewed from a dual half adder (probably the most complicated
chip in the machine). Clock speed was anything from 1/2Hz to
about 1.25MHz.

A great learning experience in 1971-2. (My day job was designing
the electrical system for a nuke plant.)

I still have it. Firing it up would probably take on a literal
meaning. ;-)

Kudos to the M-1's builder.


Do not use TFE wire in a Nuclear power plant. That insulation turns
to
a powder around that particular radiation.

Any type of ionizing radiation will make Teflon insulation crumble.

Cheers