Hello,

Electronics newbie with a question. I have a DAQ card which is
communicating with 8 perif boards over a SCSI bus. The communication
is controlled by a 20Mhz TTL clock over one of the bus lines. The DAQ
card has the option to have this clock internally generated by the DAQ
card or by feeding it an external clock. For my application it will be
necessary to feed the DAQ an external clock. I have noted the
following:

1) When looking at the internally generated clock over the bus on a
scope it looks perfect, 0-5V TTL.

2) When looking at my externally generated clock over the bus on the
scope (the exteral clock also supplies a TTL 20Mhz signal with the same
available power as the DAQ clock) the clock signal no longer looks
squarish but rather deformed looking with a sort of ringing/extra
occilating like behavior. As a note, the external clock looks fine on
the scope when not fed onto the bus.

Does anyone have any ideas as to why the external would look strange
like this on the bus while the DAQ supplied clock looks fine on the bus
even though they can supply the same amount of power? As a last note
the SCSI bus consists of 9 cables:

1 cable that has 9 connector taps ~1 inch spacing, 1 tap for the daq
and 8 taps for the additional 8 cables which are each 6 inches long and
feed the individual perif boards.

Thanks for any suggestions on this,

Kev

You probably need a termination. Rise times in nanoseconds means harmonics
in the hundreds of MHz, easily enough to generate reflections and standing
waves on unterminated lines. And woe is he who has a crappy line...I can't
imagine ribbon cable is all that happy if you don't ground every other wire.

Tim

--
Deep Fryer: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

wrote in message
ps.com...
Hello,

Electronics newbie with a question. I have a DAQ card which is
communicating with 8 perif boards over a SCSI bus. The communication
is controlled by a 20Mhz TTL clock over one of the bus lines. The DAQ
card has the option to have this clock internally generated by the DAQ
card or by feeding it an external clock. For my application it will be
necessary to feed the DAQ an external clock. I have noted the
following:

1) When looking at the internally generated clock over the bus on a
scope it looks perfect, 0-5V TTL.

2) When looking at my externally generated clock over the bus on the
scope (the exteral clock also supplies a TTL 20Mhz signal with the same
available power as the DAQ clock) the clock signal no longer looks
squarish but rather deformed looking with a sort of ringing/extra
occilating like behavior. As a note, the external clock looks fine on
the scope when not fed onto the bus.

Does anyone have any ideas as to why the external would look strange
like this on the bus while the DAQ supplied clock looks fine on the bus
even though they can supply the same amount of power? As a last note
the SCSI bus consists of 9 cables:

1 cable that has 9 connector taps ~1 inch spacing, 1 tap for the daq
and 8 taps for the additional 8 cables which are each 6 inches long and
feed the individual perif boards.

Thanks for any suggestions on this,

Kev

Tim Williams wrote:
You probably need a termination. Rise times in nanoseconds means harmonics
in the hundreds of MHz, easily enough to generate reflections and standing
waves on unterminated lines. And woe is he who has a crappy line...I can't
imagine ribbon cable is all that happy if you don't ground every other wire.

Tim


The DAQ card and perif boards all have termination. Would I need some
diode termination setup at the external clock source too? Or is having
it at the terminal devices sufficient?

In article .com,
wrote:

Tim Williams wrote:
You probably need a termination. Rise times in nanoseconds means harmonics
in the hundreds of MHz, easily enough to generate reflections and standing
waves on unterminated lines. And woe is he who has a crappy line...I can't
imagine ribbon cable is all that happy if you don't ground every other wire.

Tim


The DAQ card and perif boards all have termination. Would I need some
diode termination setup at the external clock source too? Or is having
it at the terminal devices sufficient?


SCSI is NOT voodoo. There are sound scientific reasons why there must be
*EXACTLY* three terminations involved in any successful SCSI chain: The
Termination at the Host machine, the Termination at the last peripheral
on the chain, and of course, the Termination of the chicken over the
chain, performed using a silver bladed knife on the night of moondark
whilst burning 8 black candles.

--
Don Bruder - - If your "From:" address isn't on my whitelist,
or the subject of the message doesn't contain the exact text "PopperAndShadow"
somewhere, any message sent to this address will go in the garbage without my
ever knowing it arrived. Sorry... http://www.sonic.net/~dakidd for more info

In article , Don Bruder
writes

SCSI is NOT voodoo. There are sound scientific reasons why there must be
*EXACTLY* three terminations involved in any successful SCSI chain: The
Termination at the Host machine, the Termination at the last peripheral
on the chain, and of course, the Termination of the chicken

Goats work better than chickens, but for those particularly intractable
problems, it's best to go straight to a young virgin.

--
(\__/)
(='.'=) This is Bunny. Copy and paste Bunny into your
(")_(") signature to help him gain world domination.
http://www.thisisbunny.com/

On Mon, 28 Aug 2006, Mike Tomlinson wrote:

Goats work better than chickens, but for those particularly intractable
problems, it's best to go straight to a young virgin.

I've found that for those particularly intractable problems, it's best to
go straight to your GP...

Cheers,
Pete.
Ducking for cover and running away very, very fast