I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

America: Land of the Free, Because of the Brave

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

How low is "low current"

Speed/hysteresis requirements?

What's the input signal level?


John

On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine Sometimes I even put it in the food

On Tue, 23 Sep 2008 08:33:04 -0700, Jim Thompson
wrote:


On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

...Jim Thompson


How about a couple of common-base (or common-gate) stages. Input goes
to emitters; PNP base is maybe 1 volt below Vcc; NPN base is +1 from
ground, both base drives weak if it's bipolars, anything for fets.
Collectors/drains connected together are the output.


John

On Tue, 23 Sep 2008 08:42:23 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:33:04 -0700, Jim Thompson
wrote:


On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

...Jim Thompson


How about a couple of common-base (or common-gate) stages. Input goes
to emitters; PNP base is maybe 1 volt below Vcc; NPN base is +1 from
ground, both base drives weak if it's bipolars, anything for fets.
Collectors/drains connected together are the output.


John


So its output is "0", "1", or FLOAT ?:-)

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine Sometimes I even put it in the food

Jim Thompson wrote in
:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

Suggestion: Modify the D flip flop so that the first stage is completely
turned off except for a few ns before the clock edge. This should result
in ~0 current regardless of the input voltage at all times except when you
actually need to sample the input.

If the clock frequency is low enough, this should result in some power
saving.

Regards,
Allan

On Tue, 23 Sep 2008 08:57:21 -0700, Jim Thompson
wrote:


On Tue, 23 Sep 2008 08:42:23 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:33:04 -0700, Jim Thompson
wrote:


On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

...Jim Thompson


How about a couple of common-base (or common-gate) stages. Input goes
to emitters; PNP base is maybe 1 volt below Vcc; NPN base is +1 from
ground, both base drives weak if it's bipolars, anything for fets.
Collectors/drains connected together are the output.


John


So its output is "0", "1", or FLOAT ?:-)

It floats between input peaks. If that could be forever, add a
bazillion ohm hysteresis feedback resistor from a later stage.

John

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

Try this: put some small capacitive load on the comparator output.
Drive a conventional CMOS schmitt through a transmission gate. Pulse
the transmission gate at a low duty cycle.

John

On Tue, 23 Sep 2008 08:33:04 -0700, Jim Thompson wrote:

On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold (CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

...Jim Thompson

If it's a comparator, then it's nominal outputs are '0' and '1'. In your
case its outputs are '0', '1' and 'confused'.

So why not just use a regular old Schmidt trigger? It'll catch the '0'
and '1' cases correctly, and won't do any worse with the 'confused' cases
than anything else you could cook up, unless your circuit knows more
about what's going on from somewhere else.

--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com

Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html

Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

There's this thing called a comparator.

Graham

John Larkin wrote:

Jim Thompson wrote:
John Larkin wrote:
Jim Thompson wrote:
John Larkin wrote:
Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions ?

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.

How low is "low current"

1uA

Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).

What's the input signal level?

0V-to-3.3V CMOS levels, out of a _very_ slow comparator.

How about a couple of common-base (or common-gate) stages. Input goes
to emitters; PNP base is maybe 1 volt below Vcc; NPN base is +1 from
ground, both base drives weak if it's bipolars, anything for fets.
Collectors/drains connected together are the output.


So its output is "0", "1", or FLOAT ?:-)

It floats between input peaks. If that could be forever, add a
bazillion ohm hysteresis feedback resistor from a later stage.

I hate to think what the time constants and response times must be like at
such currents. Thank heavens it's an IC.

Graham

John Larkin wrote:

Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

Try this: put some small capacitive load on the comparator output.
Drive a conventional CMOS schmitt through a transmission gate. Pulse
the transmission gate at a low duty cycle.

If a standard Schmitt still has too much overlap, when not add a sniff of
positive feedback to hurry it up ?

Graham

"BobW" wrote in
:


"Allan Herriman" wrote in message
. 153.43...
Jim Thompson wrote
in :


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can
get substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

Suggestion: Modify the D flip flop so that the first stage is
completely turned off except for a few ns before the clock edge.
This should result in ~0 current regardless of the input voltage at
all times except when you actually need to sample the input.

If the clock frequency is low enough, this should result in some
power saving.

Regards,
Allan

That's an interesting approach. However, if the clock frequency is
"low enough" then it's going to be difficult to generate the "few ns
before" enable signal.

Bob

Delay the system clock by a few ns. Use this delayed clock as the flip
flop clock. The system clock now leads the flip flop clock by a few ns.

The concept is not difficult. That shouldn't be meant to imply that the
actual implementation is trivial though. I expect the hard part is
convincing the EDA tools to do what Jim wants to do.

Regards,
Allan

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold (CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?



Something like the internal circuit of a 555 with threshold & trigger
inputs linked?

--
Mick (Working in a M$-free zone!)
Web: http://www.nascom.info http://mixpix.batcave.net
Filtering everything posted from googlegroups to kill spam.

On Tue, 23 Sep 2008 17:59:39 GMT, mick
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold (CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?



Something like the internal circuit of a 555 with threshold & trigger
inputs linked?

Takes current :-(

...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine Sometimes I even put it in the food

On Tue, 23 Sep 2008 08:33:04 -0700, Jim Thompson
wrote:


On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a _very_ slow comparator.


I'd be tempted to use the power of the input signal, so common gate
input structure is used to achieve simple voltage gain.

The output may look indeterminant, but it's not, it's just slow.

RL

On 23/09/2008 Jim Thompson wrote:


On Tue, 23 Sep 2008 08:18:58 -0700, John Larkin
wrote:

On Tue, 23 Sep 2008 08:07:40 -0700, Jim Thompson
wrote:


I need to convert a slow moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can
get substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?

...Jim Thompson

What's the technology... discrete or inside an IC?

Inside an IC, I'm designing it.


How low is "low current"

1uA


Speed/hysteresis requirements?

I have ~10us to make a decision, no hysteresis (yet).


What's the input signal level?


John


0V-to-3.3V CMOS levels, out of a very slow comparator.

...Jim Thompson

Assuming this is a repetetive action, put a sample-and-hold in front of
a Schmitt and trigger it off the back edge of the D-type clock. Of
course that won't work if it's a random event.

--
John B

"Jim Thompson" wrote in
message ...

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

Any suggestions?


A 1ua Schmitt trigger?

On 2008-09-23, Jim Thompson wrote:

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).

Problem: If I go directly into a gate or D-input of a flop I can get
substantial overlap current rail-to-rail.

This is a very low current application.

have curcuits that respond to high and low input voltages
use them to switch a R-S flip-flop
use the flip-flop to turn off the high detector when a high has been
seen most recently and to turn off the low detector when a low has
been seen most recently.

design the high detector to pass no current when presented with a
less than high input voltage and the low detector to pass no current
when presented with a more than low input voltage,

block diagram

................
: :
: high ena------------.
: detector : |
:.in.......out.: .......... |
/|\ | : : |
| `----S flip ~Q--+
in---+ : flop :
| .----R Q--+--- out
\|/ | : : |
..in.......out.. :........: |
: : |
: low ena------------'
: detector :
:..............:


Bye.
Jasen

I'm probably not seeing something obvious, but what's wrong with a plain old
4000 series CMOS Schmitt trigger chip? If the first stage doesn't square up
fast enough, there are three Schmitts left in the package to help that out a
bit.

Jim

--
"It is the mark of an educated mind to be able to entertain a thought
without accepting it."
--Aristotle


"Jim Thompson" wrote in
message ...

I need to convert a _slow_ moving analog signal to "1" or "0",
depending on whether it is above or below the digital threshold
(CMOS).