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Default Counter circuit description for Mark Main

Here's how the circuit works:

First of all, the counter is free-running (but clearable) and uses a
100kHz clock obtained by using U2 to divide the 1.000 MHz signal from
U1 by 10, yielding a 100kHz clock at U2-13

LED1 is a laser diode and Q1 is a phototransistor which saturates when
it's hit by the diode's light beam and goes open-collector when the
beam is broken by whatever's going by on the belt.

Assume that the beam has just been broken, that the collector of Q1
has just gone high, and that S1 is open.

Under those conditions, the high from S1 will steer the high-going
edge from Q1's collector through U10 (an HC00 wired as a 2-input
multiplexer) into D1 of U11, an HC175 wired as a serial-input
parallel-output shift register.

U11 is clocked by U1, with the result that each of its outputs will go
high 1µs later than its earlier neighbor when U11-4 goes high: (View
in Courier)

_ _ _ _ _ _ _
U11-9__| |_| |_| |_| |_| |_| |_| |_
_______________________
U11-4___|
____________________
u11-2______|
________________
U11-7__________|
____________
U11-10_____________|
________
U11-15_________________|


By doing this and connecting a couple of NANDs to U11 appropriately we
can get a couple of 1µs wide low-going pulses with a 1µs gap between
them, like this:

_ _ _ _ _ _ _
U11-9__| |_| |_| |_| |_| |_| |_| |_
_______________________
U11-4___|
____________________
u11-2______|
__________
U11-6 |________________
____________
U11-10_____________|
_________________
U11-15 |________
_____ ________________
U3-6 |___|
_____________ ________
U3-3 |___|


The pulse on U3-6 occurs before the pulse on U3-3, so we use that
pulse to enter and latch the data on the counter outputs into the
BCD-to-seven-segment decoder-drivers, where it'll be displayed as
numerical digits by the seven-segment displays.

One microsecond later the pulse from U3-3 will load all zeros into the
counters, clearing them and allowing them to start counting up again,
from zero, until the next rising edge comes in from U10-3, when the
new accumulated count will be captured and displayed.

Note that when whatever's breaking the beam gets out of the way U10-3
goes low, clearing U11 in a few microseconds and setting it up for a
new edge.

U18A is half of a "D" type flip-flop and is used to divide the signal
from Q1 by two which, in conjunction with S1 being closed, will cause
the counter to miss every other leading edge.

JF
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