On 23/03/2014 00:13, Jim Thompson wrote:
Lots of bad-mouthing about simulation of circuits, but here's a real
world problem for you...

Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS
devices plus a few resistors, capacitors and PNP's thrown in to make
an ANALOG circuit.

Said ANALOG circuit goes in a medical-implant environment and, to
conserve power, it is only turned on periodically, does its task, then
goes back to "sleep" for an extended period of time.

During this "sleep" period we want to ensure that only picoamps flow
during the "sleep" interval, so we devise various disconnect and
shorting devices that make sure everything is turned off.

What is always worrisome to the designer is how to ensure all possible
sneak paths are blocked, and that no nodes can FLOAT around and
ultimately turn on something by chance (it's really easy to turn on an
MOS device if its gate is floating).

So the question... in simulation we hit the "sleep" switch and then
check all nodes to make sure nothing is floating.

Visually we can do that in simulation. In PSpice all nodes can be lit
up showing the potential on each.

The snag is PEOPLE... how do we make sure we have checked every node?

More particularly, can anyone devise a way that we could automatically
find floating nodes?

I know the almighty Oz has declared simulation a crutch, but how do
you really verify what I've described... at LEAST 30,000 nodes to
check?

...Jim Thompson

Can't you take the NMOS and PMOS models and incorporate a small current
source between gate and source that would normally turn the FET on if
the gate was allowed to float?


--
Mike Perkins
Video Solutions Ltd
www.videosolutions.ltd.uk