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#1
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
Lots of bad-mouthing about simulation of circuits, but here's a real
world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#2
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On 23/03/2014 00:13, Jim Thompson wrote:
Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson Can't you take the NMOS and PMOS models and incorporate a small current source between gate and source that would normally turn the FET on if the gate was allowed to float? -- Mike Perkins Video Solutions Ltd www.videosolutions.ltd.uk |
#3
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 01:54:05 +0000, Mike Perkins
wrote: On 23/03/2014 00:13, Jim Thompson wrote: Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson Can't you take the NMOS and PMOS models and incorporate a small current source between gate and source that would normally turn the FET on if the gate was allowed to float? I think the answer is to use the built-in gmin node loading, but with a twist... still pondering ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#4
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On 23/03/2014 11:13 AM, Jim Thompson wrote:
Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? Afterthought. LTSpice RAW files don't just include all the node voltages at every instant, but also all the currents between connected nodes - since nodes are connected by components, these are identified with the components rather than with the nodes. Any circuit analysis program has to calculate both currents and voltages. They don't have to store them - and you can make LTSpice selective about what it stores - and not everybody stores them in a well-defined and easily searchable format. LTSpice is good like that, and the gEDA programs had the same philosophy. If Jim searched the currents he'd get the currents he's actually worried about, rather than the floating nodes that make the currents possible. And my list of possible programming languages should have included LISP. It was - after all - designed as a list-processing language. -- Bill Sloman, Sydney |
#5
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sat, 22 Mar 2014 17:13:41 -0700, Jim Thompson wrote:
Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson Can you run your SPICE file through a perl script or similar that appends a current source to every gate? Then set the thing to sleep mode, turn all the current sources on, and see if any voltages rise. Alternately (if the thing isn't already done), build it up with subcircuits that include the current sources that can be turned on. I don't think you want the current sources on all the time -- that would mess your simulation up at other times -- you just want the current sources on when you're verifying that sleep is really sleep. Come to think of it -- you want to do a run with each current source turned on INDIVIDUALLY. All 30000 of them. Ho boy -- you are getting paid by the hour, right? -- Tim Wescott Wescott Design Services http://www.wescottdesign.com |
#6
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#7
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 00:57:22 -0500, Tim Wescott
wrote: On Sat, 22 Mar 2014 17:13:41 -0700, Jim Thompson wrote: Lots of bad-mouthing about simulation of circuits, but here's a real world problem for you... Suppose you have a circuit made up of 10,000 NMOS and 10,000 PMOS devices plus a few resistors, capacitors and PNP's thrown in to make an ANALOG circuit. Said ANALOG circuit goes in a medical-implant environment and, to conserve power, it is only turned on periodically, does its task, then goes back to "sleep" for an extended period of time. During this "sleep" period we want to ensure that only picoamps flow during the "sleep" interval, so we devise various disconnect and shorting devices that make sure everything is turned off. What is always worrisome to the designer is how to ensure all possible sneak paths are blocked, and that no nodes can FLOAT around and ultimately turn on something by chance (it's really easy to turn on an MOS device if its gate is floating). So the question... in simulation we hit the "sleep" switch and then check all nodes to make sure nothing is floating. Visually we can do that in simulation. In PSpice all nodes can be lit up showing the potential on each. The snag is PEOPLE... how do we make sure we have checked every node? More particularly, can anyone devise a way that we could automatically find floating nodes? I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson Can you run your SPICE file through a perl script or similar that appends a current source to every gate? Then set the thing to sleep mode, turn all the current sources on, and see if any voltages rise. Alternately (if the thing isn't already done), build it up with subcircuits that include the current sources that can be turned on. I don't think you want the current sources on all the time -- that would mess your simulation up at other times -- you just want the current sources on when you're verifying that sleep is really sleep. Come to think of it -- you want to do a run with each current source turned on INDIVIDUALLY. All 30000 of them. Ho boy -- you are getting paid by the hour, right? I did indeed think of a script, actually some netlist automation thru UltraEdit. Instead of current sources I was going to use large value resistors to mid-rail (since all "sleep" devices should have their gates at rail or GND), then I realized that can be automated in Spice... set gmin (a resistor from all nodes to node 0/zero) high, then run the circuit on split rails VDDnew = VDD/2, "GND"=-VDD/2, and look for zero volts. Pay? Most of the schemes I post here are for my own edification... just had the problem come up in a small cell, maybe a few hundred nodes, voltages easily observable all at once; but then I got to fretting ;-) ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#8
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr."
wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. -- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com |
#9
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr."
wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. -- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com |
#10
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 16:39:05 -0700, John Larkin
wrote: On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's a system... aka SOC. But I acknowledge that's well beyond your mental capability :-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#11
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 16:39:05 -0700, John Larkin
wrote: On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's a system... aka SOC. But I acknowledge that's well beyond your mental capability :-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#12
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#13
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#14
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#15
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#16
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Jamie/Maynard, Displaying his fundamental ignorance. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#17
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Jamie/Maynard, Displaying his fundamental ignorance. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#18
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin
wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#19
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin
wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#20
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr."
wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie --- The way _you_ perform makes it difficult to see you imagining it trying three nodes. John Fields |
#21
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr."
wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie --- The way _you_ perform makes it difficult to see you imagining it trying three nodes. John Fields |
#22
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson
wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#23
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson
wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#24
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:03:30 -0700, John Larkin
wrote: On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. Nope. You missed it. As usual :-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#25
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:03:30 -0700, John Larkin
wrote: On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. Nope. You missed it. As usual :-} ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food. |
#26
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:12:25 -0700, Jim Thompson
wrote: On Mon, 31 Mar 2014 21:03:30 -0700, John Larkin wrote: On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. Nope. You missed it. As usual :-} ...Jim Thompson Last I saw, it was ohmic in the low uA range. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#27
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Mon, 31 Mar 2014 21:12:25 -0700, Jim Thompson
wrote: On Mon, 31 Mar 2014 21:03:30 -0700, John Larkin wrote: On Mon, 31 Mar 2014 19:48:09 -0700, Jim Thompson wrote: On Mon, 31 Mar 2014 19:44:50 -0700, John Larkin wrote: On Mon, 31 Mar 2014 21:04:18 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie It's hard to imagine an analog circuit that needs 20,000 transistors. It's like the windows OS, layer ontop of layer. Like the windows OS, how much of that 20K transistors are actually needed? I smell a lot of copy and paste from pre-existing projects, bringing with it, lard! Jamie Unless it has a thousand wirebonds, what can all those analog transistors do? I'm having trouble understanding this open display of your ignorance of complex integrated circuits?? ...Jim Thompson You're having trouble modeling a neon bulb, too. Nope. You missed it. As usual :-} ...Jim Thompson Last I saw, it was ohmic in the low uA range. -- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation |
#28
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#29
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Tue, 1 Apr 2014 18:39:27 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie --- The way _you_ perform makes it difficult to see you imagining it trying three nodes. John Fields You don't have room to talk! --- Look at all the sims I've posted - or even just one - and it should be apparent, even to you, that you're talking out of your ass. --- Did you figure out that bloggs screw up yet? --- Here's his post: "The apparent battery capacity increases dramatically at lower drain rates. So if you want to increase battery life beyond belief, the thing to do is wire the LEDs in series and then use a "boost" converter to step-up the 6V voltage to 24-30 V as required." Where's the screw-up? John Fields |
#30
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On 02/04/2014 11:59, John Fields wrote:
On Tue, 1 Apr 2014 18:39:27 -0500, "Maynard A. Philbrook Jr." wrote: --- Look at all the sims I've posted - or even just one - and it should be apparent, even to you, that you're talking out of your ass. --- Did you figure out that bloggs screw up yet? --- Here's his post: "The apparent battery capacity increases dramatically at lower drain rates. So if you want to increase battery life beyond belief, the thing to do is wire the LEDs in series and then use a "boost" converter to step-up the 6V voltage to 24-30 V as required." Where's the screw-up? John Fields It does work as advertised - his claim is not at all believable. Putting red LEDs in pairs with a basic resistor ballast hung off 6v will easily match or beat his suggested method. The buck converter on that step up ratio would be lucky to get 80% efficiency and is a lot more complex to implement. PWM regulating of the current would be another choice. The losses could then be as low as Vsat.Imax plus dissipation in a smaller series resistor to ensure chains share current more or less equally. Most LEDs can survive a higher pulsed current provided that their power dissipation is not exceeded. More of your supply voltage gets converted into light this way since Vf rises with increasing current. -- Regards, Martin Brown |
#31
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Wed, 02 Apr 2014 13:37:51 +0100, Martin Brown
wrote: On 02/04/2014 11:59, John Fields wrote: On Tue, 1 Apr 2014 18:39:27 -0500, "Maynard A. Philbrook Jr." wrote: --- Look at all the sims I've posted - or even just one - and it should be apparent, even to you, that you're talking out of your ass. --- Did you figure out that bloggs screw up yet? --- Here's his post: "The apparent battery capacity increases dramatically at lower drain rates. So if you want to increase battery life beyond belief, the thing to do is wire the LEDs in series and then use a "boost" converter to step-up the 6V voltage to 24-30 V as required." Where's the screw-up? John Fields It does work as advertised --- Bloggs' claim, yes --- his claim is not at all believable. --- Surely you mean Jamie's... --- Putting red LEDs in pairs with a basic resistor ballast hung off 6v will easily match or beat his suggested method. The buck converter on that step up ratio would be lucky to get 80% efficiency and is a lot more complex to implement. --- Of course, but you seem to have glossed over Bloggs' scheme, which was to place many LEDs in series and then to use a _boost_ converter to power the string, now bereft of all except one series current limiting resistor. --- PWM regulating of the current would be another choice. --- Sure, but with a 6V supply - not a good one. --- The losses could then be as low as Vsat.Imax plus dissipation in a smaller series resistor to ensure chains share current more or less equally. --- With a 6V supply and two 2.2V diodes in series that only leaves you with 1.6 volts of headroom for the series resistors _and_ Vsat of the PWM driver at its output. Not only that, but you've got the LEDs' Vf high-side tolerance to contend with, so PWM probably isn't the best idea. --- Most LEDs can survive a higher pulsed current provided that their power dissipation is not exceeded. More of your supply voltage gets converted into light this way since Vf rises with increasing current. --- LED's, being diodes, follow a curve where very small Vf changes result in large If changes but, with a current limiting resistor in there, changes in Vf will have little effect on the LED's output, I think. |
#32
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#33
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Wed, 2 Apr 2014 17:31:19 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Tue, 1 Apr 2014 18:39:27 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... On Sun, 23 Mar 2014 09:32:58 -0500, "Maynard A. Philbrook Jr." wrote: In article , To-Email-Use- says... I know the almighty Oz has declared simulation a crutch, but how do you really verify what I've described... at LEAST 30,000 nodes to check? ...Jim Thompson The way LTspice performs, I can't imagine it trying 30k nodes. Jamie --- The way _you_ perform makes it difficult to see you imagining it trying three nodes. John Fields You don't have room to talk! --- Look at all the sims I've posted - or even just one - and it should be apparent, even to you, that you're talking out of your ass. --- Did you figure out that bloggs screw up yet? --- Here's his post: "The apparent battery capacity increases dramatically at lower drain rates. So if you want to increase battery life beyond belief, the thing to do is wire the LEDs in series and then use a "boost" converter to step-up the 6V voltage to 24-30 V as required." Where's the screw-up? And you still don't get it do you? --- Oh, the shame of it all. Boo-hoo, I guess you're right... Why don't you explain it to me? --- I hope you were never involved in any life saving applications when you were in the job force.. --- That's just suicidal thinking. |
#34
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
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#35
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Wed, 2 Apr 2014 21:01:54 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... I hope you were never involved in any life saving applications when you were in the job force.. --- That's just suicidal thinking. I am glad you finally fest up to something. --- "Fest"??? Whoosh... --- And don't bother to reiterate on the original thread, it obviously slid under your radar. Jamie --- "Don't bother" obviously refers to your wish of not being held accountable for bogus claims you've made and therefore can't possibly back up, while your allusion to sliding under the radar is your excuse for the imaginary "screw-up" you keep harping on not causing a blip. You could end your tawdry prolonging the agony of this thread by simply pointing out Bloggs' alleged screw-up, but will you? Of course not, since you can't. Instead, you'd rather just keep on aimlessly typing, hoping against hope that one day you'll be the one to have typed out the Britannica. John Fields |
#36
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Interesting Simulation Problem
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#37
Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.cad,sci.electronics.basics
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Interesting Simulation Problem
On Thu, 3 Apr 2014 17:45:07 -0500, "Maynard A. Philbrook Jr."
wrote: In article , says... On Wed, 2 Apr 2014 21:01:54 -0500, "Maynard A. Philbrook Jr." wrote: In article , says... I hope you were never involved in any life saving applications when you were in the job force.. --- That's just suicidal thinking. I am glad you finally fest up to something. --- "Fest"??? Whoosh... --- And don't bother to reiterate on the original thread, it obviously slid under your radar. Jamie --- "Don't bother" obviously refers to your wish of not being held accountable for bogus claims you've made and therefore can't possibly back up, while your allusion to sliding under the radar is your excuse for the imaginary "screw-up" you keep harping on not causing a blip. You could end your tawdry prolonging the agony of this thread by simply pointing out Bloggs' alleged screw-up, but will you? Of course not, since you can't. Instead, you'd rather just keep on aimlessly typing, hoping against hope that one day you'll be the one to have typed out the Britannica. John Fields Useless. --- Well, I see some progress has been made in that your verbosity has decreased substantially, albeit still being bereft of worthwhile content. Perhaps another shot or two will convince you to shut the **** up and rid us all of both problems. John Fields |
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