On Fri, 8 Jun 2012 10:56:36 -0400, "tm"
wrote:


"John Larkin" wrote in message
.. .
On Fri, 8 Jun 2012 00:04:13 -0400, "tm"
wrote:


"John Larkin" wrote in
message
...

Yeah, this week I'm designing a small box, Ethernet, 5-channel
timestamper with 12 ps LSB resolution. It's for a national lab, boom
boys, but I'm putting in hooks and DRAM so it could do TOF histograms
or 2D delay-line imaging.

I get the first article of a new 10-amp NMR gradient driver to test
next week, and we're just finishing the embedded uP code for our
USB-based picosecond pulse generator.

http://www.highlandtechnology.com/DSS/T240DS.shtml

Look at that last view, #4. That is 100 ps/div, about the flattest,
cleanest pulse you'll ever see at this speed. The bullet says the
rise/fall times are 60 ps, but that's because we measure 10/90. Most
people in the picosecond business use 20/80, and by that standard our
edges are more like 40 ps. First unit ships on Monday if we finish all
the calibration software.


Five ohm output impedance? Does that cause any reflections when doing TDR?

tm

It's not for doing TDR. It's main use will be to drive amplifiers that
in turn drive lasers or E/O modulators. I assume the thing I'm driving
is a 50 ohm load. I could make it 50 ohms, but that would cut the max
amplitude in half.

Next generation, I want to do at least 6 volts, truly 50 ohms... if I
can find a driver circuit that can do it. Then I could drive E/O
modulators directly.



That makes sense. I just wasn't sure you didn't have a typo in the specs. If
there is a mismatch on the end of a cable, it could reflect back to the
pulse generator and be re-reflected off the five ohm mismatch.

I like the packaging.

tm


The box is a standard Hammond enclosure. You see them (or possibly
their clones) everywhere nowadays. Nice box, very EMI tight.

This is the PC board:

https://dl.dropbox.com/u/53724080/PC...irst_Board.JPG

Frankly, the hardest part was getting the signals out of U8 (on the
right) into the edge-launch SMA connectors, trying to keep a clean
fast 50 ohm path. Rob and I did dueling EM simulations (ATLC under
Linux, ATLC2 under Windows respectively) of the connector and PCB
stackup, and it came out pretty good, some unknown mix of wisdom and
dumb luck.

https://dl.dropbox.com/u/53724080/ATLC/T240.jpg

https://dl.dropbox.com/u/53724080/ATLC/E-field.jpg


There is a small inductive glitch at the connector/PCB transition, as
TDRd on the actual board. ATLC, being a 2D simulator, isn't up to
stuff like this. I'm theorizing that's caused by a tiny gap between
the connector PCB pads and the edge of the board. The fix would be to
move the connector footprint about 20 mils to the right. Then the PC
house would be cutting away copper when they route the board outline,
which means they would probably call us and tell us that we did the
layout wrong, and we'd have to tell them to go ahead and cut the
copper.

Some day I should lay out a board with maybe a dozen edge-launch
variations, just to find the best one.


--

John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators