On Tue, 7 Aug 2007 16:02:26 -0400, "Tom Del Rosso"
wrote:

"Jim Thompson" wrote
in message

but without the attenuator to avoid the ESD diodes... since my
custom stuff has no ESD diodes on the internal nodes.

Can you explain that? No attenuation means you don't get overshoot?
That seems backwards.

No attenuation means the free end of the capacitor can swing ABOVE and
BELOW rails without clamping.

That makes sense. When you said "without the attenuator" it sounded like
you would omit R4 and R5 in a chip design, but that's where you need it
most, where there are no diode clamps.

No. There's no reason you can't go above VDD and below ground with
the gate voltage.

Run the numbers, then you'll see how VDD falls out.

...Jim Thompson
--
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