John Popelish wrote:

Joerg wrote:

Hello Folks,

See the scope plot and excerpt from the ON Semi datasheet for the
CD4060. The blue trace is at the node RS/Rtc/Ctc, the yellow trace is
at pin 9 which is an output.

Why is there sag at the end of each phase? Rs is 500K and Rtc is 100K.
I mean, that shouldn't be any load to write home about even for a CD
series part.


I understand that you have no more room for inverter packs, but could
you jam in a few more resistors or capacitors? If so, you could improve
the feedback system to pass through the 1/2 Vdd threshold a lot faster
for the same frequency, and, thus, narrow the high current ramps.

From your scope pictures, I am assuming that the timing capacitor is
about 30 nF. If so, this configuration should give you about the same
frequency, but at a fraction of the average shoot through current for 2
extra passives:


|\ |\
+--| O---+--------| O-+
| |/ | |/ |
| .-. |
| | |20k |
| | | |
.-. '-' |
| | | || 100n |
| | 500k +----||--+ |
'-' | || | |
| .-. === |
| | | GND |
| | | |
| '-'100k |
| | ||20n|
+---------+--------||---+
||

This configuration reduces the negative feedback and load on the second
inverter and steepens the approach to Vdd/2 at the input of the first one.


Thanks. I wish I could do that but the layout, board fab and stuffing is
done :-(

Before we do a re-layout I will certainly look into this, or maybe throw
in my own transistor oscillator where I know I can get them under 10uA.
Another 40106 isn't an option because these sections must be independent
for safety reasons. While they did port the CD4000 to TSSOP it doesn't
come in singles.

--
Regards, Joerg

http://www.analogconsultants.com