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John Popelish John Popelish is offline
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Default SMT layout for multi capacitor bypass

Joerg wrote:
John Popelish wrote:

(snip)
Okay, humor me. Assume you were actually going to try to put 3 or 4
capacitors on a power pin. It is assumed that there are at least a
power and ground plane buried under the chip. How would you arrange 3
or 4 capacitor around a power pin to provide the lowest impedance over
the broadest band of frequencies if space were not a problem? What if
you had to route lots of traces past this monstrosity?


If you have a power plane over a ground plane you don't need 3-4 caps.


That's not the question. The question is "if you are going
to try taking the advice to use 3 or 4 capacitors to filter
a supply pin, how would you go about connecting them up?"

Instead of answering the question, you are giving advice. I
appreciate your experience, but it doesn't answer the
(possibly silly) question.

One or two at the most will be fine because the planes take care of
everything 100MHz. So, if something is this critical I always make
sure there is a power plane.

As to arrangement: We've done just that on a new project, or rather, my
layouter has. He placed all bypass caps on the solder side, via'd smack
dab into the pin pads.


Sorry, I can't picture "smack dab". I can picture one or
more vias passing through the power plane and connecting to
the pin pad, with several capacitors clustered around that
through connection under the pin pad. I have attached some
possible examples.

(snip)
You should see some of the other, stranger versions I came up with.
For some reason, the art of PCB layout fascinates me.



Hmm, I really don't see much art in bypassing. The artsy stuff comes
into play when you do zero-$ tapped inductors or RF couplers as artwork.
That is the only time I actually do part of a layout.


Maybe you should start a thread with some educational clips.
My best layout features, lately have been shielding and
guarding involving multiple layers. I had two socket
mounted photo diodes, one above the positive side of the
supply and one above the negative side of the supply (split
plane) all over a ground plane, with the amplifiers on the
other side, over the ground plane.

I had to keep the capacitance between the diode output pins
and those two supply planes in the fempto farads, so that I
could amplify the difference of their two outputs without
seeing any differential contamination from the supply
ripple. Took me a couple tries to get it right and involved
concentric features on all 4 layers.

Attached Thumbnails
SMT layout for multi capacitor bypass-x0201-bypass-gif