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Joerg Joerg is offline
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Default SMT layout for multi capacitor bypass

John Popelish wrote:

Joerg wrote:

John Popelish wrote:

This graphic is something I drew after thinking about the multi 0102
SMT bypass capacitor thread in sci.electronics.design. Is there a
better way to bring a supply in (from the top) past several SMT
bypass capacitors? The vias on both sides are to the ground layer.

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Yep, by having the vias to the ground plane in the pads. But be
prepared for some eggs and tomatoes flying,



Not familiar with that technical expression.


A via inside the footprint of a part is often frowned upon but it's been
done. It can mess with the thermal profile of the solder process.


from the production folks. At least make the ground traces there
wider, a little "mini plane".



I don't see the value in a mini plane connected to the buried plane with
vias, but I can see that using a wider trace that surrounds 3 sides of
the capacitor ground pad would lower the inductance of that path to the
via.


A mini plane lowers the inductance from the footprint area to the next
via but the effect is quite marginal. Much more important is that the
distance to the next via is as close to zero as you can get it.


A lot of the details of this sort of layout depend on the rules for the
PCB process (minimum solder mask width, minimum distance between via and
pad, etc.)


Yes. That's one reason I don't do layouts and probably never will. It is
a full time job to stay abreast of all that and my layouter does a very
good job. He can tell me off the top of his head whether something flies
or not, and often comes back with good alternative suggestions.

--
Regards, Joerg

http://www.analogconsultants.com