Hello Group,

I have been playing around with a 4046 Phase lock loop!
I am using it to drive two mosfet drivers one inverted and the other non
inverted which then drive a gate transformer connected to a Half Bridge.

Now when I view the square wave output with a scope from the PLL vcoout it
appears slightly un-equal.
The negative portion of the wave appears slightly shorter than the positive
portion. This is exaggerated even more when viewing the output(s) of the
mosfet gate driver (tc4421 / tc4422). I believe this is causing one side of
the half bridge to work harder which creates much more heat in one mosfet
than in the other (Well that's what I think is happening as one mosfet
becomes much hotter than the other) .

Additinal info :-
I am using a current sense transformer located around a parallel tank
circuit to send the correct phase signal to the Phase Lock Loop. This
appears to lock the PLL / VCO at the self resonant frequency of the tank
circuit, which should then drive the Half Bridge mosfets at ZCS / ZVS
causing the desired affect of soft switching.

The output on the scope suggests that soft switching is almost taking place
all though there is slight ringing which at this point I am unable to
minimalise any further and which may be connected to the above waveform
issue?

Does anyone have any idea why the initial waveform could be un-even even
when just running from the fixed VCO (ie with no PLL feedback)?

Hope this makes some degree of sense! ;-)

Regards
Steve.