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Posted to sci.electronics.design,alt.binaries.schematics.electronic,sci.electronics.basics
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On 4/18/2015 6:46 PM, John Fields wrote:
On Fri, 17 Apr 2015 14:33:40 -0400, rickman wrote: On 4/17/2015 9:11 AM, John Fields wrote: On Fri, 17 Apr 2015 00:35:00 -0400, rickman wrote: On 4/16/2015 11:25 PM, John Fields wrote: On Thu, 16 Apr 2015 20:07:46 -0400, rickman wrote: On 4/16/2015 4:46 PM, John Fields wrote: If you need the extra state, then even for huge counters the practicality fades into insignificance. John Fields I'm not sure what that means. Practicality is *always* an issue that needs consideration. The primary point of LFSRs is that they can be built to run quickly and take of little space because of the minimal logic requirements. If you throw that away you can start looking at a much larger field of contenders. --- What it means is that arranging the feedback to convert a maximal length (2^n)-1 LFSR into a PRSG with a count length of 2^n is trivial compared with other methods. Can you post a contradictory example culled from the "larger field of contenders" ? I don't see where you have provided any examples to contradict. --- I already posted a link to an 8 bit PRSG with 256 output states. Did you miss it? Apparently. --- Well, then, for your perusal, here ya go: https://www.dropbox.com/s/r7ea52axx6q6fny/LFSR.asc?dl=0 This is hardly a "huge" counter... -- Rick |
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