I'm reading Tom Frederickson's "Intuitive IC Op Amps" - in particular pg 15
concerning the op-amp schematic, and am not sure how the second stage of the
op amp works. This stage that takes the single ended current and converts
it a voltage before it's off to the output stage.

The current input goes to the base of a transistor whose emitter is
connected directly to ground and the freq compensating capacitor is placed
across the collector and base. How does this configuration work -
especially if the base input current is negative? Current is sourced from
cap?

Horowitz and Hill's 741 schematic has a 300 ohm resistor on the base input.
Is this where the current to voltage conversion takes place and was omitted
by Frederickson? In either case, still not sure where current comes from
when current mirror sinks current in stage 1.

If the sinking current mirror pulls from the cap, I would expect the mirror,
when sourcing current, to load the cap by symmetry. But in a sourcing
configuation, the transistor is now forward biased. If current is being
sunk
@ constant rate, wouldn't the magnitude of the voltage across the cap
ramp wrt time? I expected the output voltage to be proportional to
input differential voltage and not ramp in an open loop config.

Can somebody explain how current is converted to voltage in stage 2 of an
op-amp?

Totally unrelated, but what does it mean when a NPN transistor has two or
more emitters in a schematic?

Thanks,

Monty