In sci.electronics.design Tauno Voipio wrote:
On 12.12.20 19.34, wrote:
snip
Was it designed that way?
That circuit was barely designed at all. What's it supposed to do?
Agreed.
There is a voltage-controlled UJT sawtooth generator, with
outputs sent to three places:
- direct output,
- a differential pair-rectifier to cut it at the
middle for a (maybe) symmetric triangle,
- a Schmitt-trigger to create a variable width pulse
There is plenty of opportunity for improvement even when
using the block diagram (and forgetting the UJT).
You seem to know what you're talking about.
Although its ramp and triangle outputs are now restored, the Schmitt
trigger's still a work in progress. It's (manually transcribed from a
PDF and as typo-free as possible) Design Analysis is shown below. The
last paragraph in the analysis leads me to believe the Callins capacitor
was plausibly used by design.
DESIGN ANALYSIS
The central feature of the 2720-2A VCO is the self-zeroing, summing
voltage to current converter comprising of IC-1, Q1 and associated
components. Unlike the more conventional inverting summer, the feed
back voltage does not come directly from the output of the amplifier
but rather from the emitter of the current source transistor Q1. In
operation positive voltages applied to one or more of the summing
resistors (R1 - R3) force the output of the amplifier to go to
whatever negative voltage is necessary to make the same voltage
appear at both the inverting and non-inverting inputs of the op amp.
Feedback circuits are always a balancing act and the balanced point in
any linear operational amplifier circuit is reached when the two inputs
are at equal voltages. Since in this case the non-inverting input is
grounded (0v.) the inverting input must also go to zero volts.
Since the base emitter junction of Q1 is inside the feedback loop of
the summing amplifier, both the natural non-linearities and constant
voltage drop of the junction are eliminated from the response of the
current source. Both sets of resistors that serve as emitter resistances
for the current source (Range trimmer R7 in series with R6 both
paralleled by R4) terminate at ground and a virtual ground so that for
zero control volts input the source must generate zero current.
The output of the current source charges capacitor C1 which in
conjunction with Unijunction Transistor (UJT) Q2 forms a relaxation
oscillator. As increasing voltages are applied to the control inputs,
the current supplied by Q1 increases causing C1 to charge more rapidly
thereby increasing the frequency of the oscillator.
The ramp waveform that appears across C1 is applied to the input of the
darlington emitter follower consisting of Q4 and Q11. The high input
impedance of this emitter follower is important in presenting
negligible load to the timing capacitor C1. A second emitter follower Q4
in conjunction with zener diode D3 performs a level shift so that the
ramp is transposed to slightly above ground potential while a third
emitter follower (Q5) provides a low output impedance buffer to couple
the signal to the rest of the waveforming circuitry.
The ramp waveform is used three ways. First, it is applied to the
voltage divider string consisting of R11, R24, R23 and R22. Between R11
and R24 the string is capacitively coupled through C5 directly to the
"RAMP" output jack J1 where it becomes available as a signal source.
Secondly, the ramp is applied to the Schmitt trigger composed of Q9 and
Q10. A Schmitt trigger has a low output or a high output depending on
whether the input voltage is above or below a pre-set design level. As
the ramp input to the trigger begins to rise the output remains low
until the voltage exceeds this level and then abruptly changes to the
high state. The output of the trigger, then, is a rectangular pulse at
exactly the frequency of the ramp input. By varying the amplitude of the
ramp you regulate the duration of the pulse by changing the relative
point at which the trigger changes state.
Finally, the ramp is applied to the input of the differential pair Q6
and Q7. In the differential configuration the voltage at the collector
of Q7 is in phase with the input ramp and the voltage at the collector
of Q6 is inverted. The diodes D1 and D2 "select the higher of the two
collector voltages and apply it to the base of emitter follower Q8.
During the lower half of the input ramp's excursion Q6's collector
voltage is higher and that section of the ramp is presented in an
inverted form to the base of Q8. There is a slight rounding at the
bottom of the wave during the cross over between Q6 and Q7 and a slight
pip at the top during the ramp "flyback" but neither of these
imperfections are audibly noticeable.
The most voltage sensitive portions of the circuit are powered from the
simple series voltage regulator consisting of zener reference diode D4
and pass transistor Q12. Less critical parts of the circuit are powered
by the decoupling networks R33/C6 in the positive supply line and
R35/C8 in the negative supply.
Danke,
--
Don, KB7RPU
There was a young lady named Bright Whose speed was far faster than light;
She set out one day In a relative way And returned on the previous night.