On Friday, 22 December 2017 13:06:32 UTC, Fredxx wrote:
On 22/12/2017 01:24, Rod Speed wrote:
tabbypurr wrote in message
...
On Thursday, 21 December 2017 17:34:30 UTC, Terry CaseyÂ* wrote:
In article 11d4a51f-9e27-4915-a5bf-53dd39799856
@googlegroups.com, tabbypurr says...
On Thursday, 21 December 2017 11:18:44 UTC, The Other MikeÂ* wrote:
On Wed, 20 Dec 2017 15:11:25 -0800 (PST), tabbypurr wrote:


Some power resistors are only specified for claimed power
dissipation at minus 100C!

Care to point to a datasheet that shows that?

http://www.resistorsonline.com/wire-wound-resistor.html


But the table on that page is clearly headed "Rating at 70°C"!

There are 3 derating lines shown. How do you make sense of them?

For temps over 70C.

I have to admit I initially thought tabbypurr was a prat to not
understand the 3 lines, then I had a closer look and I can see his point.

I might interpret the second line down on the graph to be potential
increased rating at lower temperatures based on the 70C rating, but the
3rd graph has me stumped apart from the graph ending at 250C. I then
note 250C is the "Derate to Zero" spec. Why then do the first 2 indicate
a zero rating at 300C?

Perhaps you can care enlighten us? Hopefully in a non-belligerent,
knowledgable manner.

I think the only answer is that the necessary information is not there. But 2 of the lines at least do show 100% of specified P_diss only available at unusually low temps. However I was overly quick initially to just believe what the graph showed, evidently the whole thing doesn't add up.

FWIW silicon devices are often specced to give claimed P_diss at unrealistic case temps, I wouldn't assume any better for other components.


NT