On Wed, 11 Feb 2015 09:37:53 +0000, "Dennis@home"
wrote:

On 11/02/2015 01:04, Mike Tomlinson wrote:
En el artículo , Dave Plowman (News)
escribió:

Wonder why it's such an odd value?

It's faulty, there isn't enough load on it to regulate properly, or it's
an unregulated one.

The power probably goes direct to the ICs inside the KVM (in other
words, there's no supplementary power supply on the KVM board.)

It should be 5v +/- 5%, so 4.75 min to 5.25v max.

I wouldn't be comfortable using it on equipment specified for 5.0v.


Not all logic is 5V +/- 5%.
CMOS worked over a wide range and could even be biased to work as amps,
etc.
A usb device should be protected against odd voltages.
TTL was +/- 10% AIRI.

This last is true, +/- 10% was the standard operating tolerance for
TTL. The +/- 5% for PSU rails was the means used to guarantee
compatability between power rail voltages and TTL chip requirements in
the face of inevitable volt drops between supply and devices (cable
and circuit trace volt drops).

As you mentioned, standard cmos had a much wider operating voltage
tolerance (3 to 15 volt, afaicr) depending on how fast you wished to
operate the silicon. The cmos versions of the TTL family otoh, were
specced for the same tighter 5v +/- 10% of standard TTL (mainly to
meet speed specifications and retain compatability with existing TTL
devices).
--
J B Good