On Thu, 02 Apr 2015 20:42:50 +1000, Jasen Betts wrote:

On 2015-04-01, Jim Thompson
wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16
outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of
those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154
demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may
cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.


That is an absolute turd. It screws up if the cycle tries to repeat more
than once - it not longer visits 0 - 65535 without gaps (it outputs a
665536 which needs 17 bits) and will miss a 16 bit number every cycle
after the first, OR if the 17-th bit is ignored it will produce an excess
number of zeros.

If the mod 65537 is a mistake and it should be mod 65536, than the + 74 is
a mistake that makes the longest cycle equal to half the possibilities -
all even 16-bit numbers when the seed is an even number, and any odd
number will give a shorter cycle. Don't feel too bad RANDU by IBM made the
same mistake.

The only LCG that is easy(ish) to build with 74xx that also fulfills all
the theory on LCG's is r=5r+1 mod 2^n

I posted a 4-bit LCG with those parameters earlier.

http://www.datafilehost.com/d/c37024f6
http://www.datafilehost.com/d/a0730ba3

You need a 4-bit adder and 2 x 4 bit latches per nibble (4-bits) plus a
two phase clock or 1 inverter. So a 65536 length sequence (o to 65535) is
4 adders and 32 bits of latches.

By changing the 'shift' amounts (just plain wiring) the following also
give maximal periods without extra gates - even if they are not fully
kosher

x=9x + 1
x=17x + 1
x=33x + 1