On 12/7/2014 11:25 AM, Jim Thompson wrote:
On Sun, 07 Dec 2014 11:14:16 -0700, Don Y wrote:

On 12/7/2014 10:22 AM, Jim Thompson wrote:
Is this an attempt to obfuscate...

http://www.analog-innovations.com/SED/DataSheetAnnoyance.png

figuring that everyone is a dummy and doesn't know De Morgan's
theorems?

Depends on how *you* look at it. To me, it was immediately obvious
that the output is asserted (and that that assertion is HIGH) when
either the dogleg input at the left is LOW *or* both inputs at the
right are LOW.

The drawing suggests that NOR gates (the rightmost "AND") and NAND
gates (the leftmost "OR") are being used. One would typically
avoid "OR" gates -- which you would need if you elided the inverter
in the drawing and moved it to the dogleg input, instead.

[If you were drawing it *functionally*, the inverter would fold into
the output of the "AND" on the right (i.e., it would have bubbles on
input and output) turning it into an "OR" gate (positive logic).
The fact that this wasn't done, suggests it represents an actual
implementation instead of a functional description.]

Structurally, at least in CMOS, there's only a minute area penalty for
NOR versus NAND... hardly enough to write home about... in the NOR two
wells are required for the PMOS, but in the NAND you're stacking NMOS
which requires they each be larger than in the NOR... particularly if
you're a stickler for symmetry, as I am ;-)

Presumably, there are no inverters "off to the right" (or left) of your
drawing. So, the way it was drawn is the most economical way of
*expressing* that functionality while mimicking the implementation.

They could have, instead, replaced the NOR at the right with a pair of
inverters (bubbled inputs to reflect the LOW level of the off-page signals
that is significant to the function) feeding a NAND *without* a following
inverter. But this would, IMO, be less intuitive to someone trying to
understand what was being *done*, here.

[If not reflecting the implementation, I'd have removed the inverter AND
and added a bubble on the output of the NOR at the right -- IMO, this
makes it much clearer (but, lots of folks seem to like thinking in
positive logic with 'real' devices instead of functionally). Of course,
signal names make things a bit easier to understand...]