On 12/7/2014 10:22 AM, Jim Thompson wrote:
Is this an attempt to obfuscate...

http://www.analog-innovations.com/SED/DataSheetAnnoyance.png

figuring that everyone is a dummy and doesn't know De Morgan's
theorems?

Depends on how *you* look at it. To me, it was immediately obvious
that the output is asserted (and that that assertion is HIGH) when
either the dogleg input at the left is LOW *or* both inputs at the
right are LOW.

The drawing suggests that NOR gates (the rightmost "AND") and NAND
gates (the leftmost "OR") are being used. One would typically
avoid "OR" gates -- which you would need if you elided the inverter
in the drawing and moved it to the dogleg input, instead.

[If you were drawing it *functionally*, the inverter would fold into
the output of the "AND" on the right (i.e., it would have bubbles on
input and output) turning it into an "OR" gate (positive logic).
The fact that this wasn't done, suggests it represents an actual
implementation instead of a functional description.]