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John Larkin John Larkin is offline
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Default Question on zero-crossing circuit

On Sun, 04 May 2014 11:50:20 -0700, Jim Thompson
wrote:

On Thu, 1 May 2014 08:10:51 -0400, Douglas Beeson
wrote:

Hi all,

I did a search the other day on zero crossing detector circuits and came across this nice one by Jim Thompson:

http://www.analog-innovations.com/SED/Zero_Crossing.pdf

I think I have figured out how it works, except for capacitor C1. What does it do?

Thanks!


For those of you worried (unnecessarily) but such scare tactics as
"Most LM339s will do horrible goofy things", please see...

http://www.analog-innovations.com/SED/Test_LM339_Input_Range.pdf

Performed on a transistor-level netlist.

I had to go back and refresh my mind as to which input could give a
false logic output. As long as it's only the +IN input that goes
below ground, the LM339 won't output false logic. The -IN going below
ground will, IF -Vbe. (Current _will_ be drawn thru the ESD, just
limit it with an input resistor.)

I'll give the emperor-with-no-clothes the benefit of the doubt with
his statement, "Most LM339s will do horrible goofy things", and chalk
it up to old age forgetfulness... only if you take both inputs closer
to POSITIVE rail than ~1.4V will you choke off the (common-biased)
current mirrors and "... horrible goofy things" will happen. This
applies also to the LM324 and all devices in that same structure
class.

All of these "anomalies" can easily be understood simply by studying
the current mirror structures and what bias "starvations" happen below
-RAIL or close to +RAIL.


It's a substrate diode problem, not obvious on the comparator "schematic."


Any other questions, simply ask The Master :-} ...


What a fathead! Especially so, since you're quite wrong.


...Jim Thompson


I'd rather trust my actual experience with these parts, and the four or five
warnings on the National data sheet.

A note from the current online LM339 TI data sheet:

(3) The voltage at EITHER input or common-mode should not be allowed to go
negative by more than 0.3 V. The upper end of the commonmode voltage range is V
CC+ – 1.5 V; however, one input can exceed VCC, and the comparator will provide
a proper output state as long as the other input remains in the common-mode
range. Either or both inputs can go to 30 V without damage


That seems to be the TI part, probably different silicon from the "National"
part, a little tricky since TI acquired National. Whose silicon do they ship?

The 2004 National data sheet has three footnotes that include the same warning.
This is one of them:

Note 3: This input current will only exist when the voltage at ANY of the input
leads is driven negative. It is due to the collector-base junction of the input
PNP transistors becoming forward biased and thereby acting as input diode
clamps. In addition to this diode action, there is also lateral NPN parasitic
transistor action on the IC chip. This transistor action can cause the output
voltages of the comparators to go to the V+ voltage level (or to ground for a
large overdrive) for the time duration that an input is driven negative. This is
not destructive and normal output states will re-establish when the input
voltage, which was negative, again returns to a value greater than -0.3 VDC(at
25°)C


Note the double foldover as the input is driven progressively below ground.

Note "ANY of the input leads."

As I recall, on the National 339 and 324, pulling one input below ground can
trash all four outputs. On the 324, slaming one opamp rail-to-rail will glitch
the other three sections.

I once saved a design by replacing the LM339 with an LF347 opamp, which actually
makes a nice medium-speed comparator.

Of course, if you don't connect to the Vcc pin, and only simulate, you won't
have any problems.


"The Master"! What a fathead!


--

John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com

Precision electronic instrumentation