On Tue, 16 Oct 2012 10:54:01 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to build
a good PLL. What's worse, their oscillators quit when their control
voltages are within a volt or so of ground (the actual threshold for
misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.


Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would save
ever so much board space.

We build something like the charge-pump detector into FPGAs. We use an
external dual schottky diode for the pump-up and pump-down blips, to
avoid the deadband that tri-state charge pumps tend to create. We can
also delta-sigma those outputs to control our VXCO open-loop.

The little function generator chips make nice wide-range, low
frequency VCOs. Exar, Maxim?




--

John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com

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