Thread: Core Memory
View Single Post
  #128   Report Post  
Posted to alt.binaries.schematics.electronic
JosephKK[_3_] JosephKK[_3_] is offline
external usenet poster
 
Posts: 182
Default Core Memory

On Mon, 23 Aug 2010 04:13:17 -0500, flipper wrote:

On Mon, 23 Aug 2010 02:07:33 -0700,
wrote:

On Mon, 16 Aug 2010 22:52:14 -0500, flipper wrote:

On Mon, 16 Aug 2010 22:05:06 -0500, "Tim Williams"
wrote:

"flipper" wrote in message
m...
Well, as it turned out, the 'store' code with that relative addressing
mode was '0' and if the offset was '0' and you had '0' in the register
then it stored 0 in the next location and then executed that 0, which
did the same thing, storing another 0 in the next location, which it
then executed, which....

It simply zipped as fast as it could go perpetually writing zeroes
through all of memory over and over till you hit HALT. Mystery solved.

Yuck. It's pretty common to set 00000000b as NOP.

Well, I didn't design the thing

Although, now that you mention it, that makes me wonder if 0 as NOP
might be a 'solid state' era thing where one imagines memory powers up
0, but core memory has no such predilection.

I say "imagine" because another company I worked for got bit by
assuming that, as well as what turned out to be poor programming. They
slapped a 'code' to set end of buffer or something, I forget what, and
figured alternating ones and zeroes was reasonable.

They were using CMOS static RAMs and the dern machine went nuts when a
certain manufacturer's SRAMs were installed.

I swear it's true, the stuff powered up with the same alternating ones
and zeroes pattern in every memory location.

Other manufacturer's same part number might power up with top 4 bits
zero and bottom 4 bits 1s while others had a different pattern but
there always was one and it turned out that the manufacturing process
(layout) determined which would be 1s and 0s.

Then there was the time memory write/read diagnostics passed with no
RAM installed. LOL

In fact, I took
advantage of this the first time I ever got out a Z80-CPU to play with: I
wired it as an extremely inefficient 16-bit counter. Control lines pulled
up, D0-D7 = 00h, address lines open, LED on A15 to indicate operation.

Incidentially, I did a lot of playing with that thing without the luxury
of an oscilloscope or logic analyzer (being in my dorm room at the time).
That might be troublesome, but I just hooked a wire from breadboard to my
audio mixer and listened.

Clever idea.

Making computers play tunes by hooking up a speaker to an assigned
register bit has been done at least since the middle 1960s. I think
the technique dates back to the earliest computers (at least if the
documents are to be trusted). Certainly putting one or more bits into
a DAC and then amplified for a speaker or headphone dates back that
far.


Are you suggesting they weren't clever?

I am suggesting that you overrated the use of the technique.

Loops buzz or whine. Multilevel loops buzz and click. Data processing
has a variety of multimode sounds, resembling FM synth with squarewaves
depending on what's being done. I wrote a 32 bit LFSR, which is indeed a
very effective source of white noise. I also wrote a tone generator,
which made something more harmonious than bus noises.

Speaking of which, I took the same tone generator code, ported it to the
AVR, and loaded the same data file:
http://myweb.msoe.edu/williamstm/Solfeg_Fast.mp3
Oops...... Z80 ran at 4MHz, AVR at 8 ;-)

Tim