"Tim Streater" wrote in message
...
In article ,
Bob Eager wrote:

On Fri, 25 Jun 2010 22:14:00 +0100, Tim Streater wrote:

Could you define what's meant by "multiprogramming support" in this
context?

Two operating modes - user and executive. Or did I get it wrong and
the
4120 had that too? Enter user mode with the EXIT instruction, and
system call back with the EXEN instruction...

Yeah, OK, that's pretty common. I guess I never heard it called that
before. But then I never used any ICL kit.

There's obvioously more, if it is to be useful, but that's a good start.

We had a Honeywell DDP-516 that had a two-mode operation, but it was
useless as (for example) there was no way of telling the previous state
when an interrupt had occurred, so you couldn't restore state. Quite a
lot of other holes too. I rewired the CPU to fix the variouls issues.

Blimey wot was the point of that then (designing it that way, I mean).

IME you add some "useful" hardware feature and the programmers can't grasp
how to use so it just sits there untested and never gets fixed if its
broken.
I've been there.. I designed part of a redundant processor system where each
CPU could monitor the interrupts and the responses on the other CPUs. So if
an interrupt occurred and the CPU running the lowest priority process didn't
respond another would kick off a fault interrupt. The hardware worked great
but the idea was too hard for the "software" and it got removed during
testing. Intel later infringed the patent I had on interrupting the lowest
priority "CPU" but because we didn't use the idea someone decided the to let
the patent lapse.


You prolly want to be able to designate memory as no-access, read-only,
read/write, and execute-only, too (as well as mapping it).

I remember going to a presentation on the then-new 68000 in 1979 where
folks were asking about such features (and also what you mentioned), but
the Motorola guy said that they figured it would take too much space on
the chip. Turns out that later, when they looked into it, it didn't add
much extra at all.

I expect the machine predates the 68000.
Motorola completely mucked up the MMU they designed. They went through
several versions before they got one that worked properly and put it in the
68030.

In the meantime Intel had produced the 386 which had a working paged MMU in
it and that was what later became the normal way of doing paged memory on
Unix and the likes. Prior to that nearly every Unix machine had different
paging mechanisms.