In article ,
Bill wrote:

wrote in message
...
Idiot. A particular method of encoding negative numbers isn't
relevant when


FWIW, and I won't wish to get dragged into any muck, the algorithm for
performing of translating to negative numbers (assuming 2s complement
representation) IS relevant if one will evaluate expressions of the form
A-B as A+(-B).

The "standard' algorithm, in computer _hardware_ for getting the
2s complement 'negative' of a value is to invert the bits (1's complement
negative) and _ADD_1_ to that value. This algorithm, as does *any*
other possible algorithm, *fails* when the value to be negated is the
'most negative value' that can be represented on the machine.`

Since bitwise negation can be performed by a single transistor, I would
expect that that a value in a register could be negated VERY fast. I think
just a few clock cycles.

Yup. on a 2's complement machine, "NOT" (1's complement negate) is *much*
gaster than "NEG" (2's complement negate). On a 1's complement machine,
the opcodes are synonyms (if the latter code even _exists_, that is).

Bill