In article ,
wrote:
On Apr 13, 4:40 pm, (Robert Bonomi) wrote:
In article
,



wrote:
On Apr 13, 1:33 am, Puckdropper puckdropper(at)yahoo(dot)com wrote:
" wrote
:

That's not unusual at all. Subtraction *is* adding the negative
(complement).

OTOH, the IBM 1620 was known as the CADET (Can't Add, Didn't Even
Try). It had no ADD (or subtract) instruction at all, rather used an
index into a lookup table in memory to add. Want a different
operator? Overwrite the "ADD" lookup table, sometimes on purpose,
even.

In one of my CS classes, it was pointed out that ADD circuits are usually
smaller and easier than SUBtract circuits, so they're used more often.
That's what was so weird about the subtractor being used to emulate
addition.

Not true. The (add and subtract) operations use the same logic.

Really? I've -never- seen an IC chip that did subtraction directly. 'Adder'
chips, however, are common as dirt.

Really. Really? You haven't looked very hard.
http://www.onsemi.com/pub_link/Colla...MC10H180-D.PDF

And, you sir, "don't know what you don't know."

That chip does -not- do *actual* subtraction. The spec sheet makes that
fact abundantly clear (expressly stated in the 2nd para. of the description).
That chip is an 'adder' with added logic to 'invert' one of the inputs, so
that it can _simulate_ subtraction (by internal 'complement and add').

You can -accomplish- subtraction using an 'adder' and a bunch of inverters
on the second input (and ignore the overflow).

And _that_ is what the MC10H180, in fact, does.


True 'subtract' logic _is_ more complicated -- because the states in the
operation table do not collapse as well.
Addition: operand1 OR operand2 == 0 = zero result, zero carry
operand1 XOR operand2 == 1 = one result, zero carry
operand1 AND operand2 == 1 = zero result, one carry

Subtraction: operand1 EQ operand2 = zero result, zero borrow
operand1 EQ 1 AND operand2 EQ 0 = one result, zero borrow
operand1 EQ 0 AND operand2 EQ 1 = one result, one borrow

...which are the same operations.

Demonstrating, yet again, what you "don't know you don't know" about digital
logic circuit design.

They are _not_ 'the same operations'. They cannot be implemented with the
same logic. They cannot even be implemented with the same number of gates.

The -results- of the operations are "mathematically equivalent", but they are
*NOT* the same operations. "In theory", this is a difference that should
make no difference, but "in practice", there _is_ a difference, when you have
to implement in the real world.

To expound on the 'difference' between addition and subtraction, consider
hardware that uses "ONES COMPLEMENT" arithmetic. Where the 'negative' of
a number is represented by simply inverting all the bits of the positive
value. e.g. the negative of "00000010" is "11111101".

So what? Are you trying to prove your prowess with useless
information?

Useless? Do you know how many *BILLIONS* of dollars of scientific/engineering
computers were built using that -exact- logic, over a period of several
decades?

Those of us who actually _used_ those kinds of machines had to deal with this
"useless" behavior on a day-to-day basis.

Those machines *all* used _NATIVE_SUBTRACTION_, with addition being 'simulated'
by 'complement and subtract'.

To be absolutely explicit, on those machines _addition_ was done by running
the second operand through an inverter and then feeding that result to the
'native' subtraction circuitry. It was -not- done by disabling inverters
in front of a 'native' adder circuit. I'm sure even _you_ can see the
stupidity of running a set of (front-end) inverters before a set of
(internal to simulated subtraction logic) inverters that fed an 'adder'
circuit to generate the result.

Those who claim otherwise are ignorant of the FACTS of computing history.