Man at B&Q wrote:
On Sep 10, 2:27 pm, The Natural Philosopher
wrote:

At least one piece of Acorn hardware is known to have a bug that will
cause it to crash every ten years or so of continuous use, on average.

A little knowledge is dangerous. I would put it out of your mind
before you hurt yourself.

I could show you lots of examples of such hardware.

Any hardware that requires data to be synchronised between two
different clocks will have a finite Mean Time Between Failures. There
are well understood design practices to cope with this that do indeed
rely on statitics.

It has nothing, however, to do with calculating worst case propogation
delays through a logic path. When analysing a digital circuit for
performance worst case figures are used for max and min delay over
Process, Voltage and temperature. These figures are *always* used
cummulatively. A chain of 10 AND gates each with a max delay of 500ps
has a total delay of 5ns (ignoring routing delays for the purpose of
clarity).

You would not get very far in a job interview by trying to claim it's
anything less.


And you wouldn't get far in any manufacturing team designing like that.

IF you can get away with it, fine. You are safe, but its needlessly
restrictive, and costs more money, and prevents quite useable clock
speeds being achieeved.



MBQ