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Graham Graham is offline
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Default Monostable made from OR gate and CR network , pulse duration ??

On Nov 24, 5:05*am, Franc Zabkar wrote:
On Sun, 23 Nov 2008 13:48:53 -0800 (PST), Graham
put finger to keyboard and composed:

Ok ... Well this birds nest is about 35 years old , your right on the
'tricks' bit , *there is more than one set of discreat 'cr's' on the
board ,


I did the same calculation , with the long 'cr' time *the vlaues given
may be attached to the device thats making a *0.125 uS pulse (measured
on *teck-t 500 mhz dig scope)


CR = approx 62% full charge voltage, (5 volts) so i assume the devices
are toggeling at the zero to *logic 1 transission voltage of the
chip ...which is less than 50% rail .... so its going over early ...


I calculate that the threshold must be 1.14V. The range from 0.8V to
2.0V would be TTL limbo, at least for the SN74LS86 device I referred
to in my earlier post.

- Franc Zabkar
--
Please remove one 'i' from my address when replying by email.


Well , I have finally found a referance to the cct, in the handbook
for the racal RA1778 hf/rx which uses the cct as a pulse doubling
cct after the main tune shaft encoder , you get a output from the
leading and falling edge of the main pulse .. states the pulse will be
from 0.45 to 1.2 CR ..and gives a wide tolerance .... with cmos
logic .so looks like its a 'bodge' works .. looks quite stable

... the board I have is from the same gang made the same time period ~
1970's

Tnx- G ..