On Tue, 24 Jun 2008 23:48:31 -0500, "Tim Williams"
wrote:

"John Fields" wrote in message
.. .
LOL, there's a more or less "subtle" error (more like an
inconsistency) in the drawing.

can anyone spot it?

It seems to me it's lacking registers so the count is only updated when the
gate is off. I haven't checked what's inside all the chips.

---
That part's OK, and the gate time will be determined by how long
ENABLE- stays low and allows the chain to accumulate clocks.

For example, with a precisely 1 second long ENABLE- pulse and an input
clock of 10MHz, the display should read 10000000 from left to right.

The error I was referring to was that with the way the wiring is
shown, for a 1s long ENABLE- pulse the display would read 0000001.

The attachment shows the fix which, BTW, discloses another error and
its fix... one can't display 10000000 with seven digits.

Oh well, practice makes perfect. :-)

JF