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robb robb is offline
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Default mechanical woesfor plcc/dip adapter, a solution, help with clock waveform

i tried to install my plcc adapter only to discover that the
height clearence would not allow barely enough for dip package
height (height images follow)

so.... i used the original planned solution , that is 30 awg
kynar wires soldered direct to plcc pins, plcc sits aon small
squareof perf spacer to raise pins off PCB and then run loose
wires through dip holes and solder . (solution images follow)

iwas looking at the VFD driver clock signal (waveform) and wonder
if someone couldlook at image tell me if it needs to be
investigted and repaired ??? (wave image follows)

thanks for any useful help,
robb











Attached Thumbnails
mechanical woesfor  plcc/dip adapter, a solution, help with clock waveform-clk_waveform-jpg  mechanical woesfor  plcc/dip adapter, a solution, help with clock waveform-height_prob-jpg  mechanical woesfor  plcc/dip adapter, a solution, help with clock waveform-plcc_perf_spacer-jpg  mechanical woesfor  plcc/dip adapter, a solution, help with clock waveform-solution-jpg