Thread: I2c Sniffer
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petrus bitbyter petrus bitbyter is offline
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Default I2c Sniffer


"TT_Man" schreef in bericht
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"Eeyore" wrote in message
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TT_Man wrote:

Does anyone have a circuit for this, pref with AVR. I just need a simple
trap to catch the first Command byte- 0x Axxxx usually and then do
nothing
until the next start command.


It's not a circuit you want, it's code.

Graham


Yes, it is.... I have tried with a tiny2313 @8Mhz, but there is something
wrong with my logic as it generates multiple instances of the start
detection and I just can't figure it out.
I wanted to detect the start condition, then skip 6 clock pulses to get to
command bit 2, detect whether that bit is a 0 or a 1. Then skip and detect
the Ack ck pulse(9),then return to search for another start condition.
I'm assuming that there is adequate delay between data going low and clock
going low to detect the start bit...
I did try implementing a parallel test circuit using a 7474 to detect the
start and generate a pulse, but ended going round in circles. I suppose a
logic analyser/digital scope would help, but I have neither so fault
finding is limited to the tiny generating 'test pulses'.
Maybe I'm asking the impossible and it can ONLY be done reliably in
hardware...
I can't/don't want to go to the expense of an AVR that has inbuilt twi...


First of all, get the I2C specifications. Make sure you fully understand at
least the start - and restart conditions.
http://www.nxp.com/acrobat_download/...8/39340011.pdf

Next have a look at the bus you want to observe. What's the busspeed? You'll
never be able to sniff a 3.4Mb/s bus using an 8MHz AVR... unless you find
one that has the required I2C hardware build in.

You can go for a hardware solution but you'll need some logic design skills
to build one. To give an idea:
- Buffer the clock and data (SCL and SDA) to prevent unnessecary load.
- Tie SCL to the data - and the *inverted* SDA to the clock of a 7474 to
detect a START condition.
- Keep this start signal until it is picked up by the logic, then reset.
- All other processing will be done with SCL as a clock until a STOP or
RESTART condition occurs.

No need to say that "other processing" includes counting pulses, detecting
command bit 2 and so on.

petrus bitbyter