So John, you're saying that if I can bais the FET' Drain to Source
with the 5V while it is OFF, this will help to lower the Drain to
Source Capacitance.


Caesar

On Sat, 18 Feb 2006 18:50:54 -0800, "John Jardine."
wrote:


"LRCR" wrote in message
.. .
[...]

Caesar

FET off and the output capacitance value for the suggested Fets [Coss] will
be at a maximum as there is no drain to source voltage. Best so far is the
2N7000 that could maybe run to the 20MHz mark. Also another problem in that
the negative going sync tips will start clipping.
If it could be arranged that when OFF the Fet sees a fixed bias voltage, the
Coss values can be forced low enough to offer a respectable bandwidth. Looks
like that original -5V rail had this use but 50ma is way excessive. Why not
use the +5V rail in a similar manner.?
john