On Tue, 14 Apr 2015 08:22:07 +1000, Jim Thompson
wrote:

On Tue, 14 Apr 2015 07:20:03 +1000, "David Eather"
wrote:

On Tue, 14 Apr 2015 07:15:50 +1000, David Eather
wrote:

On Thu, 02 Apr 2015 04:00:25 +1000, Jim Thompson
wrote:

For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


Jim do you have a model of a 7483?

or 74 x 283

Yes, also. I have a 16-long LFSR already running.

...Jim Thompson

Just if you ever need one again - this is a 3 chip LCG that I have
mentioned before N1 = 5*n0 + 1

It has all 16 states and valid data is clocked in on the falling edge of
clock. They are PNG files.

Sorry to be so late to the party

http://www.datafilehost.com/d/c37024f6
http://www.datafilehost.com/d/a0730ba3

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot, but I'm not sure this formula is very
useful to implement in logic easily. The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

BTW, I did a quick search to find the method of extending an LFSR to
cover the full range of 0 to 2^N values...

http://www.xilinx.com/support/docume...es/xapp052.pdf

Seems he detects the state with N-1 ones and inverts the output. So for
a 16 bit register this requires decoding 15 bits. But for small length
LFSRs this is very practical.

--

Rick

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: skypeanalog | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

On Thu, 16 Apr 2015 09:17:29 -0700, Jim Thompson
wrote:

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson

These are electronics newsgroups. We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

Decide where you want to stand. Are Fields and Sloman the people you
want to be allied with?

Excuse me, I have some electronics stuff to do.


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 09:17:29 -0700, Jim Thompson
wrote:

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson

These are electronics newsgroups. We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

Decide where you want to stand. Are Fields and Sloman the people you
want to be allied with?

Excuse me, I have some electronics stuff to do.

Oh, my! Did you think I meant _you_ ?:-}

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: skypeanalog | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

On 4/16/2015 2:16 PM, Jim Thompson wrote:
On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 09:17:29 -0700, Jim Thompson
wrote:

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson

These are electronics newsgroups. We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

Decide where you want to stand. Are Fields and Sloman the people you
want to be allied with?

Excuse me, I have some electronics stuff to do.

Oh, my! Did you think I meant _you_ ?:-}

LOL!

The part I find very amusing is the "ancient cackling fart" who is
whining about the other "ancient cackling farts" whining. LOL!

--

Rick

On Thu, 16 Apr 2015 11:16:13 -0700, Jim Thompson
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 09:17:29 -0700, Jim Thompson
wrote:

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields




Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson




These are electronics newsgroups. We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

Decide where you want to stand. Are Fields and Sloman the people you
want to be allied with?

Excuse me, I have some electronics stuff to do.

Oh, my! Did you think I meant _you_ ?:-}

...Jim Thompson

You directly quoted my "lame retort."


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Thu, 16 Apr 2015 01:07:08 -0400, rickman
wrote:

On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot,

---
The reference to idiocy wasn't pointing to Jim, it was pointed at
Betts.
---
but I'm not sure this formula is very
useful to implement in logic easily.

---
You echo my point.
---

The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

---
You have a remarkable grasp of the obvious.
---

BTW, I did a quick search to find the method of extending an LFSR to
cover the full range of 0 to 2^N values...

http://www.xilinx.com/support/docume...es/xapp052.pdf

Seems he detects the state with N-1 ones and inverts the output. So for
a 16 bit register this requires decoding 15 bits. But for small length
LFSRs this is very practical.

---
If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

--

Rick

On Thu, 16 Apr 2015 09:17:29 -0700, Jim Thompson
wrote:

On Wed, 15 Apr 2015 18:38:49 -0500, John Fields
wrote:

On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

John Fields

Lot of that going around here... particularly from the one whose lame
retort is always, "Design any good electronics lately? Thought not."

...Jim Thompson

---
Indeed, and in the end that retort is never a genuine invitation to
share, it's always just a diversion to shift the focus of the thread
away from a question which can't be answered without loss of face or
a statement which can't be refuted.

John Fields

On Thu, 16 Apr 2015 20:07:46 -0400, rickman
wrote:

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

---
What it means is that arranging the feedback to convert a maximal
length (2^n)-1 LFSR into a PRSG with a count length of 2^n is
trivial compared with other methods.

Can you post a contradictory example culled from the "larger field
of contenders" ?

John Fields

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage and have
come to understand our own and others' personality defects, are
working on them, and aren't afraid to talk about them.

Some of us haven't.
---

Decide where you want to stand.

---
And/Or acquiesce to the showers as your final solution?
---

Are Fields and Sloman the people you want to be allied with?

---
Wow. Sounds like you're drawing a line in the sand with you on one
side and Bill and I on the other.

Why would you do that?
---

Excuse me, I have some electronics stuff to do.

---
You're excused; go do it.

John Fields

On 4/16/2015 11:25 PM, John Fields wrote:
On Thu, 16 Apr 2015 20:07:46 -0400, rickman
wrote:

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

---
What it means is that arranging the feedback to convert a maximal
length (2^n)-1 LFSR into a PRSG with a count length of 2^n is
trivial compared with other methods.

Can you post a contradictory example culled from the "larger field
of contenders" ?

I don't see where you have provided any examples to contradict.

--

Rick

On 2015-04-16, rickman wrote:
On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot, but I'm not sure this formula is very
useful to implement in logic easily. The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

The modulo is easier than the multiply.

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.



--
umop apisdn

On Fri, 17 Apr 2015 00:35:00 -0400, rickman
wrote:

On 4/16/2015 11:25 PM, John Fields wrote:
On Thu, 16 Apr 2015 20:07:46 -0400, rickman
wrote:

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

---
What it means is that arranging the feedback to convert a maximal
length (2^n)-1 LFSR into a PRSG with a count length of 2^n is
trivial compared with other methods.

Can you post a contradictory example culled from the "larger field
of contenders" ?

I don't see where you have provided any examples to contradict.

---
I already posted a link to an 8 bit PRSG with 256 output states.

Did you miss it?

John Fields

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

I'm collected some parts and am headed for the Metcal. Whine on!


--

John Larkin Highland Technology, Inc
picosecond timing precision measurement

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On 4/17/2015 9:11 AM, John Fields wrote:
On Fri, 17 Apr 2015 00:35:00 -0400, rickman
wrote:

On 4/16/2015 11:25 PM, John Fields wrote:
On Thu, 16 Apr 2015 20:07:46 -0400, rickman
wrote:

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

---
What it means is that arranging the feedback to convert a maximal
length (2^n)-1 LFSR into a PRSG with a count length of 2^n is
trivial compared with other methods.

Can you post a contradictory example culled from the "larger field
of contenders" ?

I don't see where you have provided any examples to contradict.

---
I already posted a link to an 8 bit PRSG with 256 output states.

Did you miss it?

Apparently.

--

Rick

On 4/17/2015 7:51 AM, Jasen Betts wrote:
On 2015-04-16, rickman wrote:
On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot, but I'm not sure this formula is very
useful to implement in logic easily. The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

The modulo is easier than the multiply.

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

--

Rick

On 4/17/2015 1:43 PM, John Larkin wrote:
On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

I'm collected some parts and am headed for the Metcal. Whine on!

Pot, meet kettle...

--

Rick

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

I'm collected some parts and am headed for the Metcal. Whine on!

Funny how disdain for insults pours out of one side of your mouth,
while insults pour out of the other.

John Fields

On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:
On 2015-04-16, rickman wrote:
On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot, but I'm not sure this formula is very
useful to implement in logic easily. The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

The modulo is easier than the multiply.

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

yes. I'll draw full adders like this.

in_c ---.
|
...|..
in_a : :
1n_b : + :--- out
:....:
|
carry out

mod 65537:
.--|o-.
b23-17 b15-0 1 | |
||||||| |||||||||||||| ...|.. | ...|..
||||||| |||||||||||||`--: : | 0-: : b0
||||||`-----------------o: + :--|---: + :---
|||||| ||||||||||||| :....: | :....:
|||||| ||||||||||||| | | |
|||||| ||||||||||||| ...|.. | ...|..
|||||| ||||||||||||`---: : | 0-: :
|||||`------------------o: + :--|---: + :---
||||| |||||||||||| :....: | :....:
||||| |||||||||||| | | |
||||| |||||||||||| ...|.. | ...|..
||||| |||||||||||`----: : | 0-: :
||||`-------------------o: + :--|---: + :---
|||| ||||||||||| :....: | :....:
|||| ||||||||||| | | |
|||| ||||||||||| ...|.. | ...|..
|||| ||||||||||`-----: : | 0-: :
|||`--------------------o: + :--|---: + :---
||| |||||||||| :....: | :....:
||| |||||||||| | | |
||| |||||||||| ...|.. | ...|..
||| |||||||||`------: : | 0-: :
||`---------------------o: + :--|---: + :---
|| ||||||||| :....: | :....:
|| ||||||||| | | |
|| ||||||||| ...|.. | ...|..
|| ||||||||`-------: : | 0-: :
|`----------------------o: + :--|---: + :---
| |||||||| :....: | :....:
| |||||||| | | |
| |||||||| ...|.. | ...|..
| |||||||`--------: : | 0-: :
`-----------------------o: + :--|---: + :---
||||||| :....: | :....:
||||||| | | |
||||||| ...|.. | ...|..
||||||`---------: : | 0-: :
|||||| 1-: + :--|---: + :---
|||||| :....: | :....:
|||||| | | |
|||||| ...|.. | ...|..
|||||`----------: : | 0-: :
||||| 1-: + :--|---: + :---
||||| :....: | :....:
||||| | | |
||||| ...|.. | ...|..
||||`-----------: : | 0-: :
|||| 1-: + :--|---: + :---
|||| :....: | :....:
|||| | | |
|||| ...|.. | ...|..
|||`------------: : | 0-: :
||| 1-: + :--|---: + :---
||| :....: | :....:
||| | | |
||| ...|.. | ...|..
||`-------------: : | 0-: :
|| 1-: + :--|---: + :---
|| :....: | :....:
|| | | |
|| ...|.. | ...|..
|`--------------: : | 0-: :
| 1-: + :--|---: + :---
| :....: | :....:
| | | |
| ...|.. | ...|..
`---------------: : | 0-: : b15
1-: + :--|---: + :---
:....: | :....:
| | | b16
`----' `---

note: some inverted inputs in the first column

--
umop apisdn

On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:
On 2015-04-16, rickman wrote:
On 4/15/2015 7:38 PM, John Fields wrote:
On Thu, 02 Apr 2015 17:20:47 -0700, Jim Thompson
wrote:

On Thu, 02 Apr 2015 18:52:57 -0500, John Fields
wrote:

On 2 Apr 2015 10:42:50 GMT, Jasen Betts wrote:

On 2015-04-01, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16 outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154 demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.

---
But, if you had to, what would it look like, schematic-wise?

John Fields

smirk:-}

...Jim Thompson
---
Amazing, isn't it?

Idiots with opinions post their garbage as if it was holy but post
no evidence to support their claims.

I don't know that Jim is an idiot, but I'm not sure this formula is very
useful to implement in logic easily. The multiply is not too bad and
the addition is easy. But the modulo operation by 2^16+1 is downright
hard. I think that is why he is smirking. He knows this is not very
practical...

The modulo is easier than the multiply.

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

yes. I'll draw full adders like this.

in_c ---.
|
...|..
in_a : :
1n_b : + :--- out
:....:
|
carry out

mod 65537:
.--|o-.
b23-17 b15-0 1 | |
||||||| |||||||||||||| ...|.. | ...|..
||||||| |||||||||||||`--: : | 0-: : b0
||||||`-----------------o: + :--|---: + :---
|||||| ||||||||||||| :....: | :....:
|||||| ||||||||||||| | | |
|||||| ||||||||||||| ...|.. | ...|..
|||||| ||||||||||||`---: : | 0-: :
|||||`------------------o: + :--|---: + :---
||||| |||||||||||| :....: | :....:
||||| |||||||||||| | | |
||||| |||||||||||| ...|.. | ...|..
||||| |||||||||||`----: : | 0-: :
||||`-------------------o: + :--|---: + :---
|||| ||||||||||| :....: | :....:
|||| ||||||||||| | | |
|||| ||||||||||| ...|.. | ...|..
|||| ||||||||||`-----: : | 0-: :
|||`--------------------o: + :--|---: + :---
||| |||||||||| :....: | :....:
||| |||||||||| | | |
||| |||||||||| ...|.. | ...|..
||| |||||||||`------: : | 0-: :
||`---------------------o: + :--|---: + :---
|| ||||||||| :....: | :....:
|| ||||||||| | | |
|| ||||||||| ...|.. | ...|..
|| ||||||||`-------: : | 0-: :
|`----------------------o: + :--|---: + :---
| |||||||| :....: | :....:
| |||||||| | | |
| |||||||| ...|.. | ...|..
| |||||||`--------: : | 0-: :
`-----------------------o: + :--|---: + :---
||||||| :....: | :....:
||||||| | | |
||||||| ...|.. | ...|..
||||||`---------: : | 0-: :
|||||| 1-: + :--|---: + :---
|||||| :....: | :....:
|||||| | | |
|||||| ...|.. | ...|..
|||||`----------: : | 0-: :
||||| 1-: + :--|---: + :---
||||| :....: | :....:
||||| | | |
||||| ...|.. | ...|..
||||`-----------: : | 0-: :
|||| 1-: + :--|---: + :---
|||| :....: | :....:
|||| | | |
|||| ...|.. | ...|..
|||`------------: : | 0-: :
||| 1-: + :--|---: + :---
||| :....: | :....:
||| | | |
||| ...|.. | ...|..
||`-------------: : | 0-: :
|| 1-: + :--|---: + :---
|| :....: | :....:
|| | | |
|| ...|.. | ...|..
|`--------------: : | 0-: :
| 1-: + :--|---: + :---
| :....: | :....:
| | | |
| ...|.. | ...|..
`---------------: : | 0-: : b15
1-: + :--|---: + :---
:....: | :....:
| | | b16
`----' `---

note: some inverted inputs in the first column

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

--

Rick

On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;

--
umop apisdn

On Thu, 02 Apr 2015 20:42:50 +1000, Jasen Betts wrote:

On 2015-04-01, Jim Thompson
wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:

On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:

On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:

On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...

What I need to simulate is a "random" selection of one-of-16
outputs.

Clock "speed" is 12.5kHz ;-)

Built of 74HCxx parts is preferred... I have a full ensemble of
those
device in my PSpice library.

Thanks in advance.

...Jim Thompson


How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154
demux.
If you need better randomness, use four PRBSes of different length.

Cheers

Phil Hobbs

I just need semi-random enough to test a fast AGC.

...Jim Thompson

there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may
cause
the bias point to continually drift high.

I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.


That is an absolute turd. It screws up if the cycle tries to repeat more
than once - it not longer visits 0 - 65535 without gaps (it outputs a
665536 which needs 17 bits) and will miss a 16 bit number every cycle
after the first, OR if the 17-th bit is ignored it will produce an excess
number of zeros.

If the mod 65537 is a mistake and it should be mod 65536, than the + 74 is
a mistake that makes the longest cycle equal to half the possibilities -
all even 16-bit numbers when the seed is an even number, and any odd
number will give a shorter cycle. Don't feel too bad RANDU by IBM made the
same mistake.

The only LCG that is easy(ish) to build with 74xx that also fulfills all
the theory on LCG's is r=5r+1 mod 2^n

I posted a 4-bit LCG with those parameters earlier.

http://www.datafilehost.com/d/c37024f6
http://www.datafilehost.com/d/a0730ba3

You need a 4-bit adder and 2 x 4 bit latches per nibble (4-bits) plus a
two phase clock or 1 inverter. So a 65536 length sequence (o to 65535) is
4 adders and 32 bits of latches.

By changing the 'shift' amounts (just plain wiring) the following also
give maximal periods without extra gates - even if they are not fully
kosher

x=9x + 1
x=17x + 1
x=33x + 1

On Sat, 18 Apr 2015 20:30:31 +1000, Jasen Betts wrote:

On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be
done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;


Its an abortive mistake.

It should be mod 2^n i.e. 65536. or 256 or 16 etc

also you don't use a rotation just a left shift. Each left shift by 1 bit
works like a multiply *2 and you don't need to track the carry outs or
MSB's of the shifted number the mod function throws them away anyway.

So to use an adder to multiply by say 5 you have the input number feed
into one input of the adder shifted left by 2 bits - that is 4 x the input
number. Into the other input of the adder you input the original seed - so
4 x the input number plus the input number = 5 x the input number. If the
modulus function is a power of 2 then discarding the right number of MSB's
take care of that - you don't even have to feed them into the adder since
the result will be discarded anyway.

Last if you use the carry in of the least significant adder as a + 1
function then a simple LCG takes one adder only (excluding latches you
might need to avoid race issues)

On 4/18/2015 6:30 AM, Jasen Betts wrote:
On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;

I don't need an algebraic formula to understand the logic. I am asking
how this is equivalent to mod 65537. But running through a couple of
examples I think I understand. It does a division by 65536 and adjusts
the remainder with the quotient and an additional adjustment if the
result is negative. Interesting and fairly efficient. Where did you
learn about this?

--

Rick

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

On Fri, 17 Apr 2015 14:33:40 -0400, rickman
wrote:

On 4/17/2015 9:11 AM, John Fields wrote:
On Fri, 17 Apr 2015 00:35:00 -0400, rickman
wrote:

On 4/16/2015 11:25 PM, John Fields wrote:
On Thu, 16 Apr 2015 20:07:46 -0400, rickman
wrote:

On 4/16/2015 4:46 PM, John Fields wrote:

If you need the extra state, then even for huge counters the
practicality fades into insignificance.

John Fields


I'm not sure what that means. Practicality is *always* an issue that
needs consideration. The primary point of LFSRs is that they can be
built to run quickly and take of little space because of the minimal
logic requirements. If you throw that away you can start looking at a
much larger field of contenders.

---
What it means is that arranging the feedback to convert a maximal
length (2^n)-1 LFSR into a PRSG with a count length of 2^n is
trivial compared with other methods.

Can you post a contradictory example culled from the "larger field
of contenders" ?

I don't see where you have provided any examples to contradict.

---
I already posted a link to an 8 bit PRSG with 256 output states.

Did you miss it?

Apparently.

---
Well, then, for your perusal, here ya go:

https://www.dropbox.com/s/r7ea52axx6q6fny/LFSR.asc?dl=0

Enjoy! :-)

John Fields,
Professional Circuit Designer

On Sat, 18 Apr 2015 22:15:13 +1000, "David Eather"
wrote:

On Sat, 18 Apr 2015 20:30:31 +1000, Jasen Betts wrote:

On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be
done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;


Its an abortive mistake.

It should be mod 2^n i.e. 65536. or 256 or 16 etc

also you don't use a rotation just a left shift. Each left shift by 1 bit
works like a multiply *2 and you don't need to track the carry outs or
MSB's of the shifted number the mod function throws them away anyway.

So to use an adder to multiply by say 5 you have the input number feed
into one input of the adder shifted left by 2 bits - that is 4 x the input
number. Into the other input of the adder you input the original seed - so
4 x the input number plus the input number = 5 x the input number. If the
modulus function is a power of 2 then discarding the right number of MSB's
take care of that - you don't even have to feed them into the adder since
the result will be discarded anyway.

Last if you use the carry in of the least significant adder as a + 1
function then a simple LCG takes one adder only (excluding latches you
might need to avoid race issues)

---
So you have to use a shifter, adders, latches, and some glue logic
to get to 2^n?

How is that simpler than using a shifter, a few EXORs and a NOR to
do the same thing?

John Fields

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

[snip]

Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Sno-o-o-ort! :-}

...Jim Thompson
--
| James E.Thompson | mens |
| Analog Innovations | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| San Tan Valley, AZ 85142 Skype: skypeanalog | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On Sun, 19 Apr 2015 09:00:58 +1000, John Fields
wrote:

On Sat, 18 Apr 2015 22:15:13 +1000, "David Eather"
wrote:

On Sat, 18 Apr 2015 20:30:31 +1000, Jasen Betts
wrote:

On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be
done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed.
Knowing
that you use adders doesn't help me understand how the arithmetic
works.
Is there a simple explanation? BTW, what do you do with bit 16 on
the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;


Its an abortive mistake.

It should be mod 2^n i.e. 65536. or 256 or 16 etc

also you don't use a rotation just a left shift. Each left shift by 1
bit
works like a multiply *2 and you don't need to track the carry outs or
MSB's of the shifted number the mod function throws them away anyway.

So to use an adder to multiply by say 5 you have the input number feed
into one input of the adder shifted left by 2 bits - that is 4 x the
input
number. Into the other input of the adder you input the original seed -
so
4 x the input number plus the input number = 5 x the input number. If
the
modulus function is a power of 2 then discarding the right number of
MSB's
take care of that - you don't even have to feed them into the adder
since
the result will be discarded anyway.

Last if you use the carry in of the least significant adder as a + 1
function then a simple LCG takes one adder only (excluding latches you
might need to avoid race issues)

---
So you have to use a shifter, adders, latches, and some glue logic
to get to 2^n?

NO shifter, repeat NO shifter, and total glue logic equals 1 inverter.


How is that simpler than using a shifter, a few EXORs and a NOR to
do the same thing?

John Fields

No it does not do the same thing.

I like LFSR but they may not work in the specific case Jim asked for.

A LFSR does not produce all possible output states - it will not produce
all zeros or all ones depending on the configuration. This means that it
may cause the AGC control voltage to drift high or low until it rails.
Which rather wrecks Jim's simulation.

On the other hand and LCG as I described produces every possible state
once per cycle and will not have a potential problem if used to control
and AGC.

Since it is for simulation, the cost of an LCG is not an issue and it only
takes a small time to implement.

QED.

On Sat, 18 Apr 2015 17:32:51 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.

A new 555 circuit.

On Sat, 18 Apr 2015 21:16:52 -0400, krw wrote:

On Sat, 18 Apr 2015 17:32:51 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.

A new 555 circuit.

Is that possible?


--

John Larkin Highland Technology, Inc
picosecond timing laser drivers and controllers

jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com

On 2015-04-18, David Eather wrote:
On Thu, 02 Apr 2015 20:42:50 +1000, Jasen Betts wrote:


I was wondering about that myself... I'll see if there's a cure.

r=(75*r+74)%65537 visits 0-65535 with no gaps.

not that i'd want to build it using 74LS logic.


That is an absolute turd. It screws up if the cycle tries to repeat more
than once - it not longer visits 0 - 65535 without gaps (it outputs a
665536 which needs 17 bits) and will miss a 16 bit number every cycle
after the first, OR if the 17-th bit is ignored it will produce an excess
number of zeros.

No, that is absolute bull****.

it's this:
http://en.wikipedia.org/wiki/Lehmer_...mber_generator

except offset by -1 so that the Lehmer zero state (which is
disallowed) is excluded and the maximal state fits in 16 bits.

--
umop apisdn

On 2015-04-18, rickman wrote:
On 4/18/2015 6:30 AM, Jasen Betts wrote:
On 2015-04-18, rickman wrote:
On 4/17/2015 10:56 PM, Jasen Betts wrote:
On 2015-04-17, rickman wrote:
On 4/17/2015 7:51 AM, Jasen Betts wrote:

one 16 bit - 7 bit subtract
one 16 bit + 0 bit add with carry.

I'm not following. Are you saying a modulo 65537 operation can be done
with two adders?

yes.

I appreciate the effort in the drawing, but that isn't needed. Knowing
that you use adders doesn't help me understand how the arithmetic works.
Is there a simple explanation? BTW, what do you do with bit 16 on the
input? Is that a typo? Does it go with the lsbs or the msbs?

It's a typo (or a fence-post error).

this is the arithmetic in c:

// a=a % 65537 in c:

a = a & 0xffff - ( a & ~ 0xffff ) 16;
a = a0 ? a & 0xffff + 1 : a ;

I don't need an algebraic formula to understand the logic. I am asking
how this is equivalent to mod 65537. But running through a couple of
examples I think I understand. It does a division by 65536 and adjusts
the remainder with the quotient and an additional adjustment if the
result is negative. Interesting and fairly efficient. Where did you
learn about this?

I discovered it when I was ih highschool, it's not that different to
the trick to compute y=x%11 in base 10 only it's done in base 65536
and only does two digits.

--
umop apisdn

On Sat, 18 Apr 2015 18:29:50 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 21:16:52 -0400, krw wrote:

On Sat, 18 Apr 2015 17:32:51 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.

A new 555 circuit.

Is that possible?

That's why the job is so heavy duty.

On Sat, 18 Apr 2015 17:32:51 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.

---
Sorry, loose lips sink ships...

John Fields

On Sat, 18 Apr 2015 21:16:52 -0400, krw wrote:

On Sat, 18 Apr 2015 17:32:51 -0700, John Larkin
wrote:

On Sat, 18 Apr 2015 17:35:20 -0500, John Fields
wrote:

On Fri, 17 Apr 2015 10:43:42 -0700, John Larkin
wrote:

On Thu, 16 Apr 2015 23:14:35 -0500, John Fields
wrote:

On Thu, 16 Apr 2015 10:47:36 -0700, John Larkin
wrote:


These are electronics newsgroups.

---
And, as such, your narcissistic off-topic garbage has no proper
place here.
---

We do seem to have a faction of
ancient cackling farts who only want to gossip and whine about
personalities, and drone out insults, and haven't touched a soldering
iron in years, or decades.

---
Some of us have progressed past the soldering iron stage


Now that's really sad. What do you do all day, argue and whine on
newsgroups?

---
Funny you should ask - since you've already made up your mind - but
no; I do heavy-duty innovative circuit design instead of
paint-by-number engineering.

Cool. Tell us about what you're working on.

A new 555 circuit.

---
And what, exactly, would be wrong with that?