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#131




"Random" Circuit Needed.
On Tue, 28 Apr 2015 21:38:58 0700, John Larkin
wrote: On Wed, 01 Apr 2015 11:00:25 0700, Jim Thompson wrote: For a simulation situation I need a random number generator with a twist... What I need to simulate is a "random" selection of oneof16 outputs. Clock "speed" is 12.5kHz ;) Built of 74HCxx parts is preferred... I have a full ensemble of those device in my PSpice library. Thanks in advance. ...Jim Thompson Only vaguely ontopic, here is a noise generator experiment. The mess on the left makes 1bit digital noise clocked at 1 MHz, like a linear shift register, just easier to draw. The issue at hand is what kind of lowpass filter to use to get approximately Gaussian noise. The 200 KHz filter is right out of AoE3 p 559. It looks fine in the audio frequency domain, but it's nothing like Gaussian. The 3pole filter is a lot nicer. We're actually going to use a LFSR in an FPGA and do the serious filtering digitally, and drive a DAC with a little analog filtering afterwards. I have a Daqarta "miniapp" for converting a uniform to an arbitrary distribution. I use Gaussian as the example. The Help page is at http://www.daqarta.com/dw_0oaa.htm. It includes a "Theory" section, plus the complete macro script (it's in Daqarta's own macro language, but I've added lots of comments). The basic method uses the inverse Cumulative Distribution Function (iCDF) with a lookup table. The trick is to create the proper table. Best regards, Bob Masta DAQARTA v7.60 Data AcQuisition And RealTime Analysis www.daqarta.com Scope, Spectrum, Spectrogram, Sound Level Meter Frequency Counter, Pitch Track, PitchtoMIDI FREE Signal Generator, DaqMusiq generator Science with your sound card! 
#132




"Random" Circuit Needed.
On Wed, 29 Apr 2015 02:16:52 0500, "Tim Williams"
wrote: Er, well.. surely an LFSR will be flat, not Gaussian, no? Single bit digital noise has a PDF with two big impulses, about the worst approximation to Gaussian (or flat) imaginable. So you need to sum a LOT of them to get something sort of Gaussian... the Central Limit Theorem thing. Hence the 20 KHz filter. Higherorder filters work way better than singlepole ones. If you nab 16bit words from the shift register, and not the single bit, you start with a basically flat histogram. Summing a modest number of them gets Gaussian pretty fast. That's harder to Spice. Fortunately, there is an app\\\ transform for that: http://www.design.caltech.edu/erik/Misc/Gaussian.html shouldn't be too bad to implement on FPGA. Log can be very crudely obtained as the highest active ('1') bit position, and can be improved iteratively (by repeated squarings and bitshifts, or Taylor series polynomial approximation methods). Obviously, to shoot it out of a DAC, the bounds must be strictly limited, so part of your spec will be how many sigma of Gaussian it's good for (usually 3 or so?). We have a +10 volt DAC range, and we figure that 1 volt RMS is a good number, and our 15tap FIR filter will give us a crest factor of about 5.5. That sounds OK; I don't think our customers would want truly Gaussian noise with infinite voltage spikes. Which, in turn, implies that the argument of the log can't be near zero (which is what produces the peaky outliers), and certainly can't be zero exactly (which would be undefined), so perhaps the LFSR's inherent bias could be tuned to match the dynamic range of the desired output? Nah, probably not, not for any reasonable sequence length. So you'll have to do something ugly (and hopefully not badly behaved), like RND * scale + offset. There are also methods for that  ensuring that an output of truncated, arbitrary range is calculated correctly from an even distribution in some other range. The geometric form is interesting, too; a random time delay could trigger a S&H of complementary (90 degree phase shifted) sine waves, and the other random number could feed a suitable arrangement of matched diode junctions or OTAs which computes the sqrt(ln(x)) function, and simultaneously controls the gain on the S&H buffers. The "random" time delay has a strictly bounded range, so it could be triggered on a fixed clock, 'computed', then 'registered' with a second S&H on the following clock pulse, to give regularly sampled outputs (same as you'd use extra Dflops to neaten up the transitions in a digital logic circuit). Who even needs a DAC? Or you could randomly sample a sin/cos table and vary the VREF into an MDAC, or... A tapped analog delay line is easy to Spice. If you poke in random values and evenly sum the taps, that amounts to summing a sucession of samples, so it does the Central Limit thing for you. And it's also a finiteimpulseresponse filter. Everything turns out the be the same thing, just looked at from different angles. I really need a histogram back end for LT Spice. Snarl, snap, I guess I'll have to make one.  John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com 
#133




"Random" Circuit Needed.
On Wed, 01 Apr 2015 12:06:00 0700, John Larkin
wrote: On Wed, 01 Apr 2015 11:00:25 0700, Jim Thompson wrote: For a simulation situation I need a random number generator with a twist... http://www.theregister.co.uk/2015/04...andom_numbers/  Boris  This email has been checked for viruses by Avast antivirus software. http://www.avast.com 
#134




"Random" Circuit Needed.
On Sat, 25 Apr 2015 11:17:52 +1000, "David Eather"
wrote: A paraphrase: "anyone who believes a deterministic circuit can produce true randomness is in a state of sin"  Beautiful. John Fields 
#135




"Random" Circuit Needed.
Jim Thompson
Wrote in message: On Wed, 01 Apr 2015 11:53:10 0700, Jim Thompson wrote: On Wed, 01 Apr 2015 13:27:06 0500, John Fields wrote: On Wed, 01 Apr 2015 11:00:25 0700, Jim Thompson wrote: For a simulation situation I need a random number generator with a twist... What I need to simulate is a "random" selection of oneof16 outputs. Clock "speed" is 12.5kHz ;) Built of 74HCxx parts is preferred... I have a full ensemble of those device in my PSpice library. Thanks in advance. ...Jim Thompson  If you use something like an HC154 with an LFSR driving its address inputs to generate random onehots on its outputs, will that work for you? John, What are you saying... take the outputs of the LFSR broadside to drive the address lines of the 'HC154? I think that would do it. Thanks also to Lasse for the same suggestion. ...Jim Thompson I was puzzling over how to get 0000, but then it dawned... just use an 8bit LFSR and use the last 4bits. It would be less than random because 0000 is still less likely. Better to use a fast counter and latch it before the 154. Because it's not physical maybe you'd have to jiggle the fast clock with a large resistor to one of the bits, if Spice would have a tendency to make one clock an exact multiple of the other.  
#136




"Random" Circuit Needed.
On Wed, 27 Apr 2016 15:19:18 0400 (EDT), Tom Del Rosso
wrote: Jim Thompson Wrote in message: On Wed, 01 Apr 2015 11:53:10 0700, Jim Thompson wrote: On Wed, 01 Apr 2015 13:27:06 0500, John Fields wrote: On Wed, 01 Apr 2015 11:00:25 0700, Jim Thompson wrote: For a simulation situation I need a random number generator with a twist... What I need to simulate is a "random" selection of oneof16 outputs. Clock "speed" is 12.5kHz ;) Built of 74HCxx parts is preferred... I have a full ensemble of those device in my PSpice library. Thanks in advance. ...Jim Thompson  If you use something like an HC154 with an LFSR driving its address inputs to generate random onehots on its outputs, will that work for you? John, What are you saying... take the outputs of the LFSR broadside to drive the address lines of the 'HC154? I think that would do it. Thanks also to Lasse for the same suggestion. ...Jim Thompson I was puzzling over how to get 0000, but then it dawned... just use an 8bit LFSR and use the last 4bits. It would be less than random because 0000 is still less likely. Better to use a fast counter and latch it before the 154. Because it's not physical maybe you'd have to jiggle the fast clock with a large resistor to one of the bits, if Spice would have a tendency to make one clock an exact multiple of the other. Did you notice you're replying to a YEAR OLD post ?:) ...Jim Thompson   James E.Thompson  mens   Analog Innovations  et   Analog/MixedSignal ASIC's and Discrete Systems  manus   San Tan Valley, AZ 85142 Skype: Contacts Only    Voice480)4602350 Fax: Available upon request  Brass Rat   Email Icon at http://www.analoginnovations.com  1962  The touchstone of liberalism is intolerance 
#137




"Random" Circuit Needed.
Tom Del Rosso wrote:
I was puzzling over how to get 0000, but then it dawned... just use an 8bit LFSR and use the last 4bits. OK, you don't want to just use the last N bits of the LFSR, as they will shift over VERY predictably. So, if you want to use N bits, you need to allow the LFSR to advance N clocks and then latch the N parallel bits for use. Jon 
#138




"Random" Circuit Needed.
Jim Thompson wrote:
Did you notice you're replying to a YEAR OLD post ?:) On the phone app it wasn't so obvious. I don't use it much but it was updated a month ago so I don't know why this thread was near the top. 
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