Home |
Search |
Today's Posts |
|
Electronic Schematics (alt.binaries.schematics.electronic) A place to show and share your electronics schematic drawings. |
Reply |
|
LinkBack | Thread Tools | Display Modes |
#1
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
I have this core memory brick for which I want to find a good home.
I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired |
#2
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
"flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. |
#3
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. Looks sort of like this one http://www.google.com/imgres?imgurl=...w=1209&bih=683 except mine are in a Data General Nova 2/10 mini like this puppy (not counting the top 'data rack', whatever that is). http://www.computermuseum.org.uk/mac...gen_nova2.html Mine's in a 6 foot 19 inch rack in the garage and probably home to all sort of critters by now. Somewhere I have a single plane that I believe was originally mounted on a PCB. If memory serves it had four 8 by 8 matrices. Again, I have no idea what it was from. Dan, U.S. Air Force, retired |
#4
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
ian field wrote:
"flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Dan, U.S. Air Force, retired |
#5
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
"Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. |
#6
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
ian field wrote:
"Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired |
#7
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
"Dan" wrote in message ... ian field wrote: "Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. That run of the production line was probably reserved for punishing employees with discipline issues. Maybe convicts could chose between breaking rocks and threading memory cores (with eventual transfer to a saniterium). |
#8
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Thu, 12 Aug 2010 20:47:17 +0100, "ian field"
wrote: "Dan" wrote in message m... ian field wrote: "Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. That run of the production line was probably reserved for punishing employees with discipline issues. Maybe convicts could chose between breaking rocks and threading memory cores (with eventual transfer to a saniterium). This kind of fine repetitive work was mostly done by women. IIRC, in the later stages of the life cycle some of it got moved to the Philippines etc. http://www.vt100.net/docs/misc/core/threading.jpg |
#9
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Dan wrote: Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Tennis balls? That's a job for Marines. They get to shoot every tennis ball that fails QC. ;-) |
#10
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Michael A. Terrell wrote:
Dan wrote: Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Tennis balls? That's a job for Marines. They get to shoot every tennis ball that fails QC. ;-) The Navy takes Marines on board their boats because sheep would be too obvious. Dan, U.S. Air Force, retired |
#11
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Dan wrote: Michael A. Terrell wrote: Dan wrote: Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Tennis balls? That's a job for Marines. They get to shoot every tennis ball that fails QC. ;-) The Navy takes Marines on board their boats because sheep would be too obvious. My favorite Marine joke is: When the Marines fail, they send in the submarines. |
#12
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Michael A. Terrell wrote:
Dan wrote: Michael A. Terrell wrote: Dan wrote: Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Tennis balls? That's a job for Marines. They get to shoot every tennis ball that fails QC. ;-) The Navy takes Marines on board their boats because sheep would be too obvious. My favorite Marine joke is: When the Marines fail, they send in the submarines. Sub woofer = U-boat mascot. Dan, U.S. Air Force, retired |
#13
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Dan wrote: Michael A. Terrell wrote: ? Dan wrote: ?? Michael A. Terrell wrote: ??? Dan wrote: ???? Can you imagine sitting and wiring those things all day long? I'd ???? rather glue the hair on tennis balls. ???? ???? Dan, U.S. Air Force, retired ??? ??? Tennis balls? That's a job for Marines. They get to shoot every ??? tennis ball that fails QC. ;-) ?? The Navy takes Marines on board their boats because sheep would be ?? too obvious. ? ? ? My favorite Marine joke is: ? ? When the Marines fail, they send in the submarines. Sub woofer = U-boat mascot. Dan, U.S. Air Force, retired How many Marines does it take to change a light bulb? (Scroll down) LIGHT BULB? WHAT ARE YOU, SOME KIND OF MOMMA'S BOY? NO, YOU'RE A UNITED STATES MARINE. YOU DON'T NEED NO LIGHT BULB! |
#14
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Thu, 12 Aug 2010 11:54:22 -0500, Dan wrote: flipper wrote: On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. Looks sort of like this one http://www.google.com/imgres?imgurl=...w=1209&bih=683 except mine are in a Data General Nova 2/10 mini like this puppy (not counting the top 'data rack', whatever that is). http://www.computermuseum.org.uk/mac...gen_nova2.html Mine's in a 6 foot 19 inch rack in the garage and probably home to all sort of critters by now. Somewhere I have a single plane that I believe was originally mounted on a PCB. If memory serves it had four 8 by 8 matrices. Again, I have no idea what it was from. Dan, U.S. Air Force, retired Yeah. At one time I had a loose plane but it became damaged and then 'disappeared from any known location. They're interesting because they come from a time when you could still see 'what does it', as opposed to mysterious black plastic thingies that all look alike except for pin count and numbers stamped on them. I am looking for a home for the memory in the pictures. Free to a good home. I like it for its historic value, but I'd rather someone who appreciates it more had it. Dan, U.S. Air Force, retired |
#15
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Thu, 12 Aug 2010 17:34:30 +0100, "ian field" wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It's been over a decade since I opened the box but what you described is similar to what I remember. The board is 'pizza size' and plugged into the backplane from the rear, just like going in the oven. Many years ago I had a core plane that was about 10" by 10" and sealed in epoxy or something. I have no idea where it went, I no longer have it. Dan, U.S. Air Force, retired |
#16
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Thu, 12 Aug 2010 11:56:44 -0500, Dan wrote: ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Probably more than one way to skin a cat but, if memory serves (notice the clever pun) the two zig zags were typically "sense" (as you mentioned) and "inhibit". The idea being, to speed things up, the planes were, conceptually, 'stacked' with multiple planes driven by the same X-Y select (each inducing 1/2H) and then one, or more, of the planes in the 'stack' could be 'inhibited' (I.E. remain '0') as the Z (inhibit) line (1/2H) opposed the X-Y induction. In modern parlance, translated to the 'stacked planes' arrangement, that would be 'byte wise' vertical (assuming 8 planes). X-Y is 'byte select' and Z (inhibit) selects the 'bit'. I suppose one could consider that a 'write' line (inverted) but I always heard it called inhibit (which initially confused the hell out of me) and, technically, they're all involved in 'write' since it takes the coincidence of all three, in the proper polarity, to induce the magnetic field. You then get a pulse on the (per plane) sense (bit) line if the core (magnetization) flips. Note that the data is non-volatile but read is destructive so the data just read has to be rewritten. They did make 3 wire planes too, though, with the one zig zag acting as sense during read and inhibit during write but I don't know why that wasn't done from the get go. Maybe it was easier, at the time, to string a 2n'd ziggie than deal with isolating a low impedance driver from the sense amp input. They also made core 'PROMS', of a sort, called rope or braided wire memory. You have a core for each bit and then 'factory program' which are to be 1 or 0 by threading the select lines either through, or not through, the corresponding bit core. If it goes through the bit core a 1 on that sense line will occur when selected and if it doesn't then it won't. The data was 'wired in'. For some reason I remembered it as write. I haven't played with with the stuff since Pontius was a pilot. I don't recall 3 wire systems, but I'll take your word. I had forgotten rope memory until I saw a recent show on the Apollo program where they were driving the women who made the ropes almost crazy with rewrites. And to think I found machine code tedious. Dan, U.S. Air Force, retired |
#17
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Thu, 12 Aug 2010 12:58:06 -0500, Dan wrote: ian field wrote: "Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Aw, come on. Here, give it a try. http://cgi.ebay.com/VINTAGE-RAW-FERR...efaultDomain_0 45,000 pieces should be plenty to get you started on a respectable 4k byte memory plane, with 12 thousand or so spares for those fumble fingered moments. I may be crazy, but I am not certifiable. I sure would be after trying that. However, I would be willing to watch with great interest while you try it. Dan, U.S. Air Force, retired |
#18
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Mon, 16 Aug 2010 00:55:12 -0500, Dan wrote: flipper wrote: On Thu, 12 Aug 2010 11:56:44 -0500, Dan wrote: ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Probably more than one way to skin a cat but, if memory serves (notice the clever pun) the two zig zags were typically "sense" (as you mentioned) and "inhibit". The idea being, to speed things up, the planes were, conceptually, 'stacked' with multiple planes driven by the same X-Y select (each inducing 1/2H) and then one, or more, of the planes in the 'stack' could be 'inhibited' (I.E. remain '0') as the Z (inhibit) line (1/2H) opposed the X-Y induction. In modern parlance, translated to the 'stacked planes' arrangement, that would be 'byte wise' vertical (assuming 8 planes). X-Y is 'byte select' and Z (inhibit) selects the 'bit'. I suppose one could consider that a 'write' line (inverted) but I always heard it called inhibit (which initially confused the hell out of me) and, technically, they're all involved in 'write' since it takes the coincidence of all three, in the proper polarity, to induce the magnetic field. You then get a pulse on the (per plane) sense (bit) line if the core (magnetization) flips. Note that the data is non-volatile but read is destructive so the data just read has to be rewritten. They did make 3 wire planes too, though, with the one zig zag acting as sense during read and inhibit during write but I don't know why that wasn't done from the get go. Maybe it was easier, at the time, to string a 2n'd ziggie than deal with isolating a low impedance driver from the sense amp input. They also made core 'PROMS', of a sort, called rope or braided wire memory. You have a core for each bit and then 'factory program' which are to be 1 or 0 by threading the select lines either through, or not through, the corresponding bit core. If it goes through the bit core a 1 on that sense line will occur when selected and if it doesn't then it won't. The data was 'wired in'. For some reason I remembered it as write. Maybe some manufacturer's used that terminology, I don't know, but it sounds like a solid state person retrofitting 'modern' language, which would describe me at the time. As a fresh out of school engineer I was, of course, more interested in the latest and greatest 'Sci-Fi' grade 'high tech', which meant solid state, and was only forced to deal with core memory in the 'real world' because there were still machines out there using it. That's why I was initially rather confused with 'inhibit'. I mean, address, select, clock, read, write, and even "sense," all make sense but why the hell would you want to 'inhibit' memory? Is this some sort of Alzheimer emulator? The 'ah ha' moment comes when you get right down to the core of it. snicker I haven't played with with the stuff since Pontius was a pilot. I don't recall 3 wire systems, but I'll take your word. It was one of those "oh, so you thought, eh?" kind of things. Just as I had confidently gotten that 'core memory' stuff down some yahoo shoves a 3 wire job in front of me. I had forgotten rope memory until I saw a recent show on the Apollo program where they were driving the women who made the ropes almost crazy with rewrites. ROTFLOL Oh man, I wish I had thought of that story when the CAD guy was complaining about having to revise drawings on an R&D project.. And to think I found machine code tedious. Used to be you weren't officially even an 'entry level computer guy' till you knew how to key in the bootstrap from memory. I mean your memory. I had enough time with those blasted coding forms, whatever the proper term was. I miss das switchen und blinken lighten. Computers should have lots of blinking lights. If nothing else you could stare at the lights and pretend you were in deep thought. If nothing else it was soothing. Oh wow, I hadn't though of that in decades but 'das blinken lighten' reminds me of the time I, as a high school 'summer job' teenager, found a fatal flaw in a new computer design but it's too long for here. If you're interested I'll tell it. You could start another thread. Dan, U.S. Air Force, retired In avionics we used the term "when in doubt tune for maximum flame and minimum smoke." Dan, U.S. Air Force, retired |
#19
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Mon, 16 Aug 2010 01:10:52 -0500, Dan wrote: flipper wrote: On Thu, 12 Aug 2010 12:58:06 -0500, Dan wrote: ian field wrote: "Dan" wrote in message ... ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Its decades since I set eyes on it. Can you imagine sitting and wiring those things all day long? I'd rather glue the hair on tennis balls. Dan, U.S. Air Force, retired Aw, come on. Here, give it a try. http://cgi.ebay.com/VINTAGE-RAW-FERR...efaultDomain_0 45,000 pieces should be plenty to get you started on a respectable 4k byte memory plane, with 12 thousand or so spares for those fumble fingered moments. I may be crazy, but I am not certifiable. I sure would be after trying that. However, I would be willing to watch with great interest while you try it. LOL Well, you're more patient than I. I might watch a couple strung and then come back to collect the finished panel... after it's gone through test and Q.A. If I could sit through interminable Soviet awareness, AFR 66-1 and other courses or briefings I can watch someone assemble cores. Some of those courses were about as stimulating as watching paint dry. Dan, U.S. Air Force, retired |
#20
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
As I recall, the cores for the 3-wire scheme needed to be held to very
tight specs so that they not only worked but worked with the same timings as the others in the array. Even in the 4-wire scheme manufacturing would hand select drivers & sense amps to build an array that would work. That was a problem in the field because sometimes a tech would swap everything swap able from a broke array to another machine which was working. Then there were two systems down hard! Time to send out for food, we are going to be here a while....! Towards the end of the IBM 360 cycle production had reached the point where hand selection was not normally required, but it did not start that way. I believe that adding a 64K array to an existing 64K storage module on an IBM 360/40 in 1966 cost the customer $75,000. For reference, I think a new Ford Mustang cost $2500. IBM had a big campaign to dehumanize the machinery, memory became storage and you no longer crippled circuits you disabled them! On Mon, 16 Aug 2010 00:37:50 -0500, flipper wrote: On Thu, 12 Aug 2010 11:56:44 -0500, Dan wrote: ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Probably more than one way to skin a cat but, if memory serves (notice the clever pun) the two zig zags were typically "sense" (as you mentioned) and "inhibit". The idea being, to speed things up, the planes were, conceptually, 'stacked' with multiple planes driven by the same X-Y select (each inducing 1/2H) and then one, or more, of the planes in the 'stack' could be 'inhibited' (I.E. remain '0') as the Z (inhibit) line (1/2H) opposed the X-Y induction. In modern parlance, translated to the 'stacked planes' arrangement, that would be 'byte wise' vertical (assuming 8 planes). X-Y is 'byte select' and Z (inhibit) selects the 'bit'. I suppose one could consider that a 'write' line (inverted) but I always heard it called inhibit (which initially confused the hell out of me) and, technically, they're all involved in 'write' since it takes the coincidence of all three, in the proper polarity, to induce the magnetic field. You then get a pulse on the (per plane) sense (bit) line if the core (magnetization) flips. Note that the data is non-volatile but read is destructive so the data just read has to be rewritten. They did make 3 wire planes too, though, with the one zig zag acting as sense during read and inhibit during write but I don't know why that wasn't done from the get go. Maybe it was easier, at the time, to string a 2n'd ziggie than deal with isolating a low impedance driver from the sense amp input. They also made core 'PROMS', of a sort, called rope or braided wire memory. You have a core for each bit and then 'factory program' which are to be 1 or 0 by threading the select lines either through, or not through, the corresponding bit core. If it goes through the bit core a 1 on that sense line will occur when selected and if it doesn't then it won't. The data was 'wired in'. Dan, U.S. Air Force, retired |
#21
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Mon, 16 Aug 2010 14:26:32 -0400, John Ferrell
wrote: As I recall, the cores for the 3-wire scheme needed to be held to very tight specs so that they not only worked but worked with the same timings as the others in the array. Even in the 4-wire scheme manufacturing would hand select drivers & sense amps to build an array that would work. That was a problem in the field because sometimes a tech would swap everything swap able from a broke array to another machine which was working. Then there were two systems down hard! Time to send out for food, we are going to be here a while....! Towards the end of the IBM 360 cycle production had reached the point where hand selection was not normally required, but it did not start that way. I believe that adding a 64K array to an existing 64K storage module on an IBM 360/40 in 1966 cost the customer $75,000. For reference, I think a new Ford Mustang cost $2500. IBM had a big campaign to dehumanize the machinery, memory became storage and you no longer crippled circuits you disabled them! IIRC, a meg of memory for a 370/145 cost close to a $1 per byte, installed. |
#22
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
snip I imagine IBM didn't think that kind of mythology fit the 'IBM culture'. Plus, their 'not computer savvy' customers probably didn't want 'crazy computer brains' taking over their companies, or the whole country. And don't tell me it can't happen because I saw Colossus: The Forbin Project (1970) and one of those damn things drive Wally Cox crazy in a Twilight Zone episode (From Agnes - with Love [1964]) I liked "Colossus, The Forbin Project" when it came out. Then I started analyzing it and figured out numerous was to sabotage the system. The funny thing is at that time neither computer would have operated very long without repair. One of my favorites was a meaningless byline to the plot in Star Trek, the original series, "Tomorrow Is Yesterday" (1967) where the computer keeps calling Kirk "dear." As Spock explained, the computer system had been 'repaired' on a planet dominated by women and they felt it lacked a 'personality'. So they gave it one. Female, of course. It also has an unfortunate tendency to giggle. I prefer the voice of HAL. At least he didn't have the chugga-chugga sounds every time he had to process something. The Colossus voice was downright creepy. Dan, U.S. Air Force, retired |
#23
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory - Gefingerpoken_by_infralite.png (0/1)
On Mon, 16 Aug 2010 02:20:20 -0500, flipper wrote:
On Mon, 16 Aug 2010 00:55:12 -0500, Dan wrote: flipper wrote: On Thu, 12 Aug 2010 11:56:44 -0500, Dan wrote: ian field wrote: "flipper" wrote in message ... On Thu, 12 Aug 2010 00:49:12 -0500, Dan wrote: I have this core memory brick for which I want to find a good home. I have no idea what it came out of. I have had it for 40 years and doubt I ever knew. Dan, U.S. Air Force, retired Oh my, that is an oldie. The core memory I've got is planar on a PCB. The one I have/had is/was a PCB a bit more than a foot square with thousands of tiny ferrite rings suspended by a matrix of wires and a third wire that zig-zagged through every core. It either got shoved behind the book shelf in the beddroom or slung out - I can't remember which. It should be 4 wires through each core. One each X and Y, and two the zig zag through them all. One of the latter is sense, the other is write. Probably more than one way to skin a cat but, if memory serves (notice the clever pun) the two zig zags were typically "sense" (as you mentioned) and "inhibit". The idea being, to speed things up, the planes were, conceptually, 'stacked' with multiple planes driven by the same X-Y select (each inducing 1/2H) and then one, or more, of the planes in the 'stack' could be 'inhibited' (I.E. remain '0') as the Z (inhibit) line (1/2H) opposed the X-Y induction. In modern parlance, translated to the 'stacked planes' arrangement, that would be 'byte wise' vertical (assuming 8 planes). X-Y is 'byte select' and Z (inhibit) selects the 'bit'. I suppose one could consider that a 'write' line (inverted) but I always heard it called inhibit (which initially confused the hell out of me) and, technically, they're all involved in 'write' since it takes the coincidence of all three, in the proper polarity, to induce the magnetic field. You then get a pulse on the (per plane) sense (bit) line if the core (magnetization) flips. Note that the data is non-volatile but read is destructive so the data just read has to be rewritten. They did make 3 wire planes too, though, with the one zig zag acting as sense during read and inhibit during write but I don't know why that wasn't done from the get go. Maybe it was easier, at the time, to string a 2n'd ziggie than deal with isolating a low impedance driver from the sense amp input. They also made core 'PROMS', of a sort, called rope or braided wire memory. You have a core for each bit and then 'factory program' which are to be 1 or 0 by threading the select lines either through, or not through, the corresponding bit core. If it goes through the bit core a 1 on that sense line will occur when selected and if it doesn't then it won't. The data was 'wired in'. For some reason I remembered it as write. Maybe some manufacturer's used that terminology, I don't know, but it sounds like a solid state person retrofitting 'modern' language, which would describe me at the time. As a fresh out of school engineer I was, of course, more interested in the latest and greatest 'Sci-Fi' grade 'high tech', which meant solid state, and was only forced to deal with core memory in the 'real world' because there were still machines out there using it. That's why I was initially rather confused with 'inhibit'. I mean, address, select, clock, read, write, and even "sense," all make sense but why the hell would you want to 'inhibit' memory? Is this some sort of Alzheimer emulator? The 'ah ha' moment comes when you get right down to the core of it. snicker I haven't played with with the stuff since Pontius was a pilot. I don't recall 3 wire systems, but I'll take your word. It was one of those "oh, so you thought, eh?" kind of things. Just as I had confidently gotten that 'core memory' stuff down some yahoo shoves a 3 wire job in front of me. I had forgotten rope memory until I saw a recent show on the Apollo program where they were driving the women who made the ropes almost crazy with rewrites. ROTFLOL Oh man, I wish I had thought of that story when the CAD guy was complaining about having to revise drawings on an R&D project.. And to think I found machine code tedious. Used to be you weren't officially even an 'entry level computer guy' till you knew how to key in the bootstrap from memory. I mean your memory. I miss das switchen und blinken lighten. Computers should have lots of blinking lights. Oh wow, I hadn't though of that in decades but 'das blinken lighten' reminds me of the time I, as a high school 'summer job' teenager, found a fatal flaw in a new computer design but it's too long for here. If you're interested I'll tell it. Dan, U.S. Air Force, retired Lesen sie gut su: |
#24
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory - Gefingerpoken_by_infralite.png (1/1)
|
#25
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
"flipper" wrote in message
... Well, as it turned out, the 'store' code with that relative addressing mode was '0' and if the offset was '0' and you had '0' in the register then it stored 0 in the next location and then executed that 0, which did the same thing, storing another 0 in the next location, which it then executed, which.... It simply zipped as fast as it could go perpetually writing zeroes through all of memory over and over till you hit HALT. Mystery solved. Yuck. It's pretty common to set 00000000b as NOP. In fact, I took advantage of this the first time I ever got out a Z80-CPU to play with: I wired it as an extremely inefficient 16-bit counter. Control lines pulled up, D0-D7 = 00h, address lines open, LED on A15 to indicate operation. Incidentially, I did a lot of playing with that thing without the luxury of an oscilloscope or logic analyzer (being in my dorm room at the time). That might be troublesome, but I just hooked a wire from breadboard to my audio mixer and listened. Loops buzz or whine. Multilevel loops buzz and click. Data processing has a variety of multimode sounds, resembling FM synth with squarewaves depending on what's being done. I wrote a 32 bit LFSR, which is indeed a very effective source of white noise. I also wrote a tone generator, which made something more harmonious than bus noises. Speaking of which, I took the same tone generator code, ported it to the AVR, and loaded the same data file: http://myweb.msoe.edu/williamstm/Solfeg_Fast.mp3 Oops...... Z80 ran at 4MHz, AVR at 8 ;-) Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms |
#26
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
On Mon, 16 Aug 2010 02:34:53 -0500, Dan wrote: flipper wrote: snip I miss das switchen und blinken lighten. Computers should have lots of blinking lights. If nothing else you could stare at the lights and pretend you were in deep thought. If nothing else it was soothing. Oh wow, I hadn't though of that in decades but 'das blinken lighten' reminds me of the time I, as a high school 'summer job' teenager, found a fatal flaw in a new computer design but it's too long for here. If you're interested I'll tell it. You could start another thread. Well, the machine had core memory and while that has nothing to do with the story it's enough to feign continuity The reason das blinken lighten reminded me of it is because, just as Scotty opined in "Relics" that he could tell the speed the Enterprise (no bloody A, B, C, *or* D) was going "by the feel of the deck plates," so it was with your program and das blinken lighten. I had a summer job at a company that, among other things, made minicomputers and was assigned to write a very simple 'exercise' machine language program for a new tape drive they were working on. I could tell where the program was by the blinks. Load tape, blinky blinky, seek record, blinkity blink blink, read record, blip blip blip blip blip.. etc. Then all hell broke loose with every address light coming on as the machine zipped through all of memory. What the...? That ain't right. And I can't reset the program either. I look at the data buffer: all zeroes. Look at the program: all zeroes. Everything is zeroes with not a single core set to '1' (notice now I worked in "core" memory ) Now, the computer was a prototype and the tape drive was a prototype, so there weren't a plethora of diagnostic tools for these dern things, and with memory all zeroes 'debug' became pretty much an intellectual exercise. The obvious first guess is I made a programming error but I had made it as simple as possible to preclude just this sort of thing, yet there I was staring at all 0's. There had to be *something* writing all those zeroes and it couldn't be the tape drive. For one, it wasn't anywhere near *that* fast. And it couldn't be my program either since, even if it tried, it would crash before finishing from being corrupted to '0s' itself and executing 0 would... uh Ah HA! Executing 0 was a 'fatal flaw' but how did a 0 get there to begin with? I finally concluded that, under these circumstances, the 'fatal flaw' couldn't be tripped unless... gulp... "the geniuses who work here and wouldn't if they weren't" had miswired the DMA channel but, as 'the kid', was a bit reluctant to tell them as much. But I did and they had. The DMA channel was sprinkling data where ever it felt like which, of course (thank you Murphy), included on top of my program and that confirmed the 'fatal flaw' trigger could happen. The 'fatal flaw' was how the op code worked and, in particular, 'store the A register' (or whichever register, I forget). As was typical of the era, one of the addressing modes divided the 16 bit word into two halves with the first being op code plus some addressing mode bits and the second half an 8 bit relative offset. The machine executed in the order: fetch instruction, increment address counter, execute instruction, so an offset of '0' meant the next location after the instruction (not terribly useful and, in this case, tragic). Well, as it turned out, the 'store' code with that relative addressing mode was '0' and if the offset was '0' and you had '0' in the register then it stored 0 in the next location and then executed that 0, which did the same thing, storing another 0 in the next location, which it then executed, which.... It simply zipped as fast as it could go perpetually writing zeroes through all of memory over and over till you hit HALT. Mystery solved. One could argue that would only happen in combination with some other 'error' (like it did there) but that's not only tempting Murphy it's handing him exactly the kind of 'passes every diagnostic one in a million only happens at the worst possible moment' screw up he loves to dish out. And wiping all evidence to 0 was a real nice finishing touch. I suggested they modify the op codes so that the essentially useless '0' offset be interpreted as defining an 'extended' 2 word instruction with the next word used as an absolute address (and double increment around it). I never got any word back that summer on how they took the suggestion but was rather pleased to observe a few years later that the official instruction set did, indeed, define that same double word extension. (I also noticed they changed the op code value but that doesn't eliminate the problem. It only alters which 'magic number' would trigger it.) You always remember the bizarre ones and I'll never forget das blinken lighten going zaaaaaaaaaaaaaaaaaaaap across the address register Dan, U.S. Air Force, retired In avionics we used the term "when in doubt tune for maximum flame and minimum smoke." Dan, U.S. Air Force, retired Egad, I have made programming mistakes as bad as that, but no one ever accused me of being an expert. Dan, U.S. Air Force, retired |
#27
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory - Gefingerpoken_by_infralite.png (1/1)
JosephKK wrote:
Martin Caiden had a similar sign in his Ju-52. I snagged a ride in it in 1978. As I climbed into it I saw a sign that was fractured German. I remember very little of it, but the last lines were something about if we come back alive "ve grabben der champagne und poppen der corken." In the early 1970s a electronics supplier gave a company I later worked for a sign that said "Caution: 50,000 ohms." Dan, U.S. Air Force, retired |
#28
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Mon, 16 Aug 2010 21:28:21 -0500, flipper wrote:
On Mon, 16 Aug 2010 02:34:53 -0500, Dan wrote: flipper wrote: snip I miss das switchen und blinken lighten. Computers should have lots of blinking lights. If nothing else you could stare at the lights and pretend you were in deep thought. If nothing else it was soothing. Oh wow, I hadn't though of that in decades but 'das blinken lighten' reminds me of the time I, as a high school 'summer job' teenager, found a fatal flaw in a new computer design but it's too long for here. If you're interested I'll tell it. You could start another thread. Well, the machine had core memory and while that has nothing to do with the story it's enough to feign continuity The reason das blinken lighten reminded me of it is because, just as Scotty opined in "Relics" that he could tell the speed the Enterprise (no bloody A, B, C, *or* D) was going "by the feel of the deck plates," so it was with your program and das blinken lighten. I had a summer job at a company that, among other things, made minicomputers and was assigned to write a very simple 'exercise' machine language program for a new tape drive they were working on. I could tell where the program was by the blinks. Load tape, blinky blinky, seek record, blinkity blink blink, read record, blip blip blip blip blip.. etc. Then all hell broke loose with every address light coming on as the machine zipped through all of memory. What the...? That ain't right. And I can't reset the program either. I look at the data buffer: all zeroes. Look at the program: all zeroes. Everything is zeroes with not a single core set to '1' (notice now I worked in "core" memory ) Now, the computer was a prototype and the tape drive was a prototype, so there weren't a plethora of diagnostic tools for these dern things, and with memory all zeroes 'debug' became pretty much an intellectual exercise. The obvious first guess is I made a programming error but I had made it as simple as possible to preclude just this sort of thing, yet there I was staring at all 0's. There had to be *something* writing all those zeroes and it couldn't be the tape drive. For one, it wasn't anywhere near *that* fast. And it couldn't be my program either since, even if it tried, it would crash before finishing from being corrupted to '0s' itself and executing 0 would... uh Ah HA! Executing 0 was a 'fatal flaw' but how did a 0 get there to begin with? I finally concluded that, under these circumstances, the 'fatal flaw' couldn't be tripped unless... gulp... "the geniuses who work here and wouldn't if they weren't" had miswired the DMA channel but, as 'the kid', was a bit reluctant to tell them as much. But I did and they had. The DMA channel was sprinkling data where ever it felt like which, of course (thank you Murphy), included on top of my program and that confirmed the 'fatal flaw' trigger could happen. The 'fatal flaw' was how the op code worked and, in particular, 'store the A register' (or whichever register, I forget). As was typical of the era, one of the addressing modes divided the 16 bit word into two halves with the first being op code plus some addressing mode bits and the second half an 8 bit relative offset. The machine executed in the order: fetch instruction, increment address counter, execute instruction, so an offset of '0' meant the next location after the instruction (not terribly useful and, in this case, tragic). Well, as it turned out, the 'store' code with that relative addressing mode was '0' and if the offset was '0' and you had '0' in the register then it stored 0 in the next location and then executed that 0, which did the same thing, storing another 0 in the next location, which it then executed, which.... It simply zipped as fast as it could go perpetually writing zeroes through all of memory over and over till you hit HALT. Mystery solved. One could argue that would only happen in combination with some other 'error' (like it did there) but that's not only tempting Murphy it's handing him exactly the kind of 'passes every diagnostic one in a million only happens at the worst possible moment' screw up he loves to dish out. And wiping all evidence to 0 was a real nice finishing touch. I suggested they modify the op codes so that the essentially useless '0' offset be interpreted as defining an 'extended' 2 word instruction with the next word used as an absolute address (and double increment around it). I never got any word back that summer on how they took the suggestion but was rather pleased to observe a few years later that the official instruction set did, indeed, define that same double word extension. (I also noticed they changed the op code value but that doesn't eliminate the problem. It only alters which 'magic number' would trigger it.) You always remember the bizarre ones and I'll never forget das blinken lighten going zaaaaaaaaaaaaaaaaaaaap across the address register Dan, U.S. Air Force, retired In avionics we used the term "when in doubt tune for maximum flame and minimum smoke." Dan, U.S. Air Force, retired 0 (*octal* 0) was no-op on the PDP-8, and there was a short program that filled all of core with 0, leaving it circulating around the 4K memory forever. The PDP-11 had the LandMine instruction MOV -(PC), -(PC) octal 014747 which copied itself one location below the current address, then re-executed that. The PDP-11 was cool. The PC was just another register (R7, actually) so you could do all the math ops onto it... clear, complement, negate, rotate, subtract... John |
#29
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Tim Williams wrote:
"flipper" wrote in message ... Well, as it turned out, the 'store' code with that relative addressing mode was '0' and if the offset was '0' and you had '0' in the register then it stored 0 in the next location and then executed that 0, which did the same thing, storing another 0 in the next location, which it then executed, which.... It simply zipped as fast as it could go perpetually writing zeroes through all of memory over and over till you hit HALT. Mystery solved. Yuck. It's pretty common to set 00000000b as NOP. In fact, I took advantage of this the first time I ever got out a Z80-CPU to play with: I wired it as an extremely inefficient 16-bit counter. Control lines pulled up, D0-D7 = 00h, address lines open, LED on A15 to indicate operation. Incidentially, I did a lot of playing with that thing without the luxury of an oscilloscope or logic analyzer (being in my dorm room at the time). That might be troublesome, but I just hooked a wire from breadboard to my audio mixer and listened. Loops buzz or whine. Multilevel loops buzz and click. Data processing has a variety of multimode sounds, resembling FM synth with squarewaves depending on what's being done. I wrote a 32 bit LFSR, which is indeed a very effective source of white noise. I also wrote a tone generator, which made something more harmonious than bus noises. Speaking of which, I took the same tone generator code, ported it to the AVR, and loaded the same data file: http://myweb.msoe.edu/williamstm/Solfeg_Fast.mp3 Oops...... Z80 ran at 4MHz, AVR at 8 ;-) Tim I think Byte magazine had a schematic for a board that would generate 8 lines on a standard scope. Circuit Cellar article, if memory serves. I never built one, but it might have made life a lot easier at the time. Dan, U.S. Air Force, retired |
#30
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Mon, 16 Aug 2010 22:13:09 -0500, flipper wrote:
On Mon, 16 Aug 2010 20:07:20 -0500, Dan wrote: flipper wrote: snip I imagine IBM didn't think that kind of mythology fit the 'IBM culture'. Plus, their 'not computer savvy' customers probably didn't want 'crazy computer brains' taking over their companies, or the whole country. And don't tell me it can't happen because I saw Colossus: The Forbin Project (1970) and one of those damn things drive Wally Cox crazy in a Twilight Zone episode (From Agnes - with Love [1964]) I liked "Colossus, The Forbin Project" when it came out. Yeah, me too. Although, I knew it "was over" about 5 minutes into the thing when they caved to the first challenge. Then I started analyzing it and figured out numerous was to sabotage the system. The funny thing is at that time neither computer would have operated very long without repair. Well, we could propose a number of theories to get around that but trying to get movies or TV 'scientifically accurate' is worse than pushing a wet noodle uphill. That just isn't 'the direction' they're interested in going. Of course, the biggest flaw in most of them is no one in their right mind would make a computer/robot with NO freaking OFF switch. They at least got that part sort of right with Star Trek's M5. There was *supposed* to be an 'off switch' but the loony computer 'protected itself'. An obvious design flaw Kind of fun watching Kirk out psych it, though. I did greatly enjoy the series' multiple forays into 'logic' but if *I* were Nomad Kirk would have lost the debate. One of my favorites was a meaningless byline to the plot in Star Trek, the original series, "Tomorrow Is Yesterday" (1967) where the computer keeps calling Kirk "dear." As Spock explained, the computer system had been 'repaired' on a planet dominated by women and they felt it lacked a 'personality'. So they gave it one. Female, of course. It also has an unfortunate tendency to giggle. I prefer the voice of HAL. Oh, yes. I loved HAL. "Look, Dave, I can see you're really upset about this. I honestly think you ought to sit down calmly, take a stress pill and think things over." At least he didn't have the chugga-chugga sounds every time he had to process something. Hehe. Yeah, well, it was 1967. The 'computer' needed to sound like a 'machine', or so they thought. That's still the era where you know you're getting 'timely news' because they have TTYs going clackety clackety in the background. Star Trek is certainly dated but I remember thinking, at the time, that the beeps and blips the control buttons, communicator, etc, made was a stroke of genius, while my parents thought it was down right silly. Of course, just about everything 'beeps' these days. The Colossus voice was downright creepy. I don't really remember it. Dan, U.S. Air Force, retired Playing on local talk radio right now: We are all, by any practical definition of the words, foolproof and incapable of error... error... error... error... error... error... error... error... The script is at: http://www.imdb.com/title/tt0062622/quotes ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Spice is like a sports car... Performance only as good as the person behind the wheel. |
#31
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote:
snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, the PDP-12 with a CRT seemed wonderful. Dan, U.S. Air Force, retired |
#32
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
"flipper" wrote in message
... Then there was the time memory write/read diagnostics passed with no RAM installed. LOL Ha! I seem to recall hearing about that in IBM-PC compatibles. There are supposed to be pullups on the data bus, so it open-circuits to FFh when nothing's addressed. But if data were present sufficiently recently (either from the instruction being processed, or a previous I/O / DMA / bus mastering operation in the case of an I/O bridge*), and the charge wasn't bled out by pullups or TTL inputs, it would happily remain floating at whatever level by the time it's read. The bus charge will act as one byte of DRAM, accessible from all unaddressed locations! *AFAIK, an I/O bridge is standard equipment, at least on the 16 bit models. My Amstrad 1640 has a 16-bit "FSB" so to speak, coupled to the 8-bit I/O bus through some gate array chip. I'm guessing this bus is only active when addressed, since the manufacturer would know exactly where all that "FSB" memory is going (00000-9FFFF), easy to minimise bus operations that way. As I recall, all empty locations in said computer read FFh as they're supposed to. I don't recall if I tested it at speed; maybe it's possible to observe the effect in consecutive operations. Also about that computer, the documentation (which I managed to find online) is quite technical. It tells a lot about what the BIOS does, how the hardware works, where all the registers are and what they do, and so on. With that information, you could write your own ROM, boot loader, build your own hardware, etc. It also mentions how the memory is scanned during POST -- combinations of bit and address patterns, scan up, scan down, etc. Heh.. I never did see the value in checking memory. In the old days it was supposed to be unreliable, they even added parity (I've got a whopping 80kiB wasted on parity RAMs!). I've *never* seen a memory error on an old machine, and as far as I know, the RAM chips never fail, at least not after possible infant mortality (which I can't possibly know about, being that I am only 1 year older than this machine, which is a pretty new machine for an 8086!). Ironically, new memory seems a lot less reliable, though I am of course hard pressed to do a proper statistical comparison between 2000 IBM-PCs that I've never seen, vs. a single 2GB DIMM running at clock speeds a few orders of magnitude faster... Tim -- Deep Friar: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms |
#33
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote:
On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Spice is like a sports car... Performance only as good as the person behind the wheel. |
#34
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Jim Thompson wrote:
On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote: On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson Computers and model trains? Egad, not live steam, I hope. Dan, U.S. Air Force, retired |
#35
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Tue, 17 Aug 2010 09:53:42 -0500, Dan wrote:
Jim Thompson wrote: On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote: On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson Computers and model trains? Egad, not live steam, I hope. Dan, U.S. Air Force, retired Electric, HO and (IIRC) TT gauge. Occupied two rooms in MIT's infamous (but now replaced) all-WWII-wood-construction Building 20. However, here in AZ, we have a reduced-scale live-steam train at McCormick-Stillman Railroad Park, Scottsdale. ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Spice is like a sports car... Performance only as good as the person behind the wheel. |
#36
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Jim Thompson wrote:
On Tue, 17 Aug 2010 09:53:42 -0500, Dan wrote: Jim Thompson wrote: On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote: On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson Computers and model trains? Egad, not live steam, I hope. Dan, U.S. Air Force, retired Electric, HO and (IIRC) TT gauge. Occupied two rooms in MIT's infamous (but now replaced) all-WWII-wood-construction Building 20. However, here in AZ, we have a reduced-scale live-steam train at McCormick-Stillman Railroad Park, Scottsdale. ...Jim Thompson I'm in the process of building a live steam Pennsylvania switcher in 3/4" scale, 3.5 gauge track. Dan, U.S. Air Force, retired |
#37
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
On Tue, 17 Aug 2010 10:12:26 -0500, Dan wrote:
Jim Thompson wrote: On Tue, 17 Aug 2010 09:53:42 -0500, Dan wrote: Jim Thompson wrote: On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote: On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson Computers and model trains? Egad, not live steam, I hope. Dan, U.S. Air Force, retired Electric, HO and (IIRC) TT gauge. Occupied two rooms in MIT's infamous (but now replaced) all-WWII-wood-construction Building 20. However, here in AZ, we have a reduced-scale live-steam train at McCormick-Stillman Railroad Park, Scottsdale. ...Jim Thompson I'm in the process of building a live steam Pennsylvania switcher in 3/4" scale, 3.5 gauge track. Dan, U.S. Air Force, retired Nice! Will there be an inaugural party? ...Jim Thompson -- | James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Spice is like a sports car... Performance only as good as the person behind the wheel. |
#38
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
Jim Thompson wrote:
On Tue, 17 Aug 2010 10:12:26 -0500, Dan wrote: Jim Thompson wrote: On Tue, 17 Aug 2010 09:53:42 -0500, Dan wrote: Jim Thompson wrote: On Tue, 17 Aug 2010 00:27:03 -0500, flipper wrote: On Mon, 16 Aug 2010 23:39:48 -0500, Dan wrote: flipper wrote: snip I really liked the PDP-11 and have one of the 'micro' versions. John I really liked the HP 2114A. The teletype I could do without now, but I was used to it from timeshare days. The system we used had a tower with a desk on the left for the TTY. The tower included and optical tape reader, optical card reader which used cards one marked with a pencil, the 2114A and a storage drawer with a hand held rewinder for longer tapes. I can find pictures of the 2114A, but not the entire system. I took a tour of Digital's Maynard facility and was impressed with the PDP-12. Having used the PDP-8S, where the S stood for SLOW, LOL. Yes, it's 1 bit serial ALU was deadly slow but it was also a lot cheaper at $10k vs $25k for the 'fast' fellah. In one of my EE courses we designed some interfaces for the PDP-8, which was very simple to do so we spend most of the time playing spacewar on it. hehe That's the way to play a 'computer game', boy. Down in the bowels of a computer lab with scopes, racks, and hardware scattered about so it looks like you're doing something 'technical'. the PDP-12 with a CRT seemed wonderful. A bit quirky, though. I'll take a PDP-11 any day. Dan, U.S. Air Force, retired I typed my MIT Bachelor's Thesis onto paper tape, using the flexowriter input to a PDP-8. I think I still have the paper tape around here somewhere... 48 years later ;-) (Fellow classmate and PDP-8 hacker Alan Kotok (later a significant digital architect at DEC, deceased May 26, 2006) and I were good buddies and members of the model railroad club :-) ...Jim Thompson Computers and model trains? Egad, not live steam, I hope. Dan, U.S. Air Force, retired Electric, HO and (IIRC) TT gauge. Occupied two rooms in MIT's infamous (but now replaced) all-WWII-wood-construction Building 20. However, here in AZ, we have a reduced-scale live-steam train at McCormick-Stillman Railroad Park, Scottsdale. ...Jim Thompson I'm in the process of building a live steam Pennsylvania switcher in 3/4" scale, 3.5 gauge track. Dan, U.S. Air Force, retired Nice! Will there be an inaugural party? ...Jim Thompson No, at the rate I am going I will be about 150 years old and not ready to party I will probably run it on compressed air a few times and steam it once then donate it to the local library. Dan, U.S. Air Force, retired |
#39
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
I spent a lot of time there as a Field Engineer.
It was FET storage and terribly unreliable. It was endowed with on-the-fly error recovery or it would have never worked at all. You could count on rebooting the system at least once a shift. On top of that it was power hungry. 200 to 400 amp three phase service was the norm. Some were powered with motor generator sets to convert to 400 cycle power. I never even heard of an MG set failing though. They would carry the mainframe through a power flicker most of the time. Of course, the rest of the system would power off! The MG sets could be a challenge for an emergency generator to power up. In spite of all its warts, the 145 was very popular with the customers. An awful lot of performance for the money. I don't think anyone was sorry to see it go. It helped me retire at a young age so I remember it fondly. On Mon, 16 Aug 2010 20:38:28 -0400, PeterD wrote: On Mon, 16 Aug 2010 14:26:32 -0400, John Ferrell wrote: As I recall, the cores for the 3-wire scheme needed to be held to very tight specs so that they not only worked but worked with the same timings as the others in the array. Even in the 4-wire scheme manufacturing would hand select drivers & sense amps to build an array that would work. That was a problem in the field because sometimes a tech would swap everything swap able from a broke array to another machine which was working. Then there were two systems down hard! Time to send out for food, we are going to be here a while....! Towards the end of the IBM 360 cycle production had reached the point where hand selection was not normally required, but it did not start that way. I believe that adding a 64K array to an existing 64K storage module on an IBM 360/40 in 1966 cost the customer $75,000. For reference, I think a new Ford Mustang cost $2500. IBM had a big campaign to dehumanize the machinery, memory became storage and you no longer crippled circuits you disabled them! IIRC, a meg of memory for a 370/145 cost close to a $1 per byte, installed. John Ferrell W8CCW |
#40
Posted to alt.binaries.schematics.electronic
|
|||
|
|||
Core Memory
flipper wrote: One of my favorites was a meaningless byline to the plot in Star Trek, the original series, "Tomorrow Is Yesterday" (1967) where the computer keeps calling Kirk "dear." As Spock explained, the computer system had been 'repaired' on a planet dominated by women and they felt it lacked a 'personality'. So they gave it one. Female, of course. It also has an unfortunate tendency to giggle. Well, at least that's a computer of the future where anything's possible A giggle is better than a rude '404 ERROR!' on your screen. |
Reply |
Thread Tools | Search this Thread |
Display Modes | |
|
|