Single pulse in, multiple pulse output circuit (from seb) - PINBALL.pdf
 

How it works:

Assume that the circuit is inactive and that a positive "start" pulse
has been placed on input "5". That pulse will go to U1-3, disabling the
counter for as long as the pulse stays high and, at the same time, will
be sent to the presets corresponding to the number of clocks to be
counted, to C1, where its leading edge will be differentiated and
inverted by Q1, and then sent to the Asynchronous Preset Enable input of
the counter, U1, where it will load whatever is on the preset inputs of
U1 into U1.

Note that when the start pulse hits CR 15,16, and 17, it's sent to R5
and R7, which are connected to the "4" and "1" presets of U1, which will
load binary "5" into the counter when the low-going spike from Q1 gets
to U1-9.

That spike also SETS the RS latch U1A-U1B, which then enables the clock
astable U1C-U1D and allows it to start making clocks.

With the latch set, U1-4 will be low and will light the BUSY LED and
send a low BUSY signal to the coin validate lockout.

Now, the counter will count down with each positive going edge from the
clock generator until it gets to zero.

When that happens, the Zero Detect output of U1 (U1-14) will go low,
resetting the latch, which will stop the clock generator, turn off the
LED, and force the BUSY OUT signal high for as long as the five input
ports stay low.

Then when any one of them goes high again, the cycle will begin anew.

Here's how the presets are "programmed":


n P7 P6 P5 P4 P3 P2 P1 P0
-----|----|----|----|----|----|----|----|----
100 0 1 1 0 0 1 0 0

50 0 0 1 1 0 0 1 0

20 0 0 0 1 0 1 0 0

10 0 0 0 0 1 0 1 0

5 0 0 0 0 0 1 0 1

Where "1" is 12V and "0" is 0V (GND)


JF