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Redone to minimize area.
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"Jon Slaughter" schreef in bericht et... Redone to minimize area. Hmm... nice picture. But what's its use? Guess I missed something. petrus bitbyter |
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"petrus bitbyter" wrote in message l.nl... "Jon Slaughter" schreef in bericht et... Redone to minimize area. Hmm... nice picture. But what's its use? Guess I missed something. Its a digital level translator. Theres 8 discrete channels and 8 integrated. The IC does it but isn't full duplex or direction independent like the discrete ones which is why I had to put them in. |
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On 18/10/2007 Jon Slaughter wrote:
"petrus bitbyter" wrote in message l.nl... "Jon Slaughter" schreef in bericht et... Redone to minimize area. Hmm... nice picture. But what's its use? Guess I missed something. Its a digital level translator. Theres 8 discrete channels and 8 integrated. The IC does it but isn't full duplex or direction independent like the discrete ones which is why I had to put them in. And the schematic is where? -- John B |
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"John B" wrote in message t... On 18/10/2007 Jon Slaughter wrote: "petrus bitbyter" wrote in message l.nl... "Jon Slaughter" schreef in bericht et... Redone to minimize area. Hmm... nice picture. But what's its use? Guess I missed something. Its a digital level translator. Theres 8 discrete channels and 8 integrated. The IC does it but isn't full duplex or direction independent like the discrete ones which is why I had to put them in. And the schematic is where? Huh... this is not for. It's not something special that I'm giving out or anything. Just a simple project I did and I posted my results because I had a discussion with some others about routing issues. |
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On Thu, 18 Oct 2007 15:54:14 GMT, "Jon Slaughter"
wrote: Redone to minimize area. Minor pickey: we wouldn't parallel the two surface-mount pins (lower-left on the chip) like that. It would look too much like a solder bridge. It's better to run the paralleling trace off to the left, where it's more visible and makes inspection easier. Of course, you already know that it's not a solder bridge! John |
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"John Larkin" wrote in message ... On Thu, 18 Oct 2007 15:54:14 GMT, "Jon Slaughter" wrote: Redone to minimize area. Minor pickey: we wouldn't parallel the two surface-mount pins (lower-left on the chip) like that. It would look too much like a solder bridge. It's better to run the paralleling trace off to the left, where it's more visible and makes inspection easier. Of course, you already know that it's not a solder bridge! Maybe, I thought about it because it sorta looks odd the way I did it. I was either thinking to run them both to the source in parallel or sorta "hook" one into the other(the hook looked ust as ugly). In this case it wasn't a big deal so I just did the easiest thing ;) Although, maybe it could cause a slight issue with seating the leads? I guess I'll find out when I solder them. Still trying to figure out how to print it well. Ink jet on transparency isnt' working to well. Its about 5 to 10% transparent and very irregular. Probably fine for short exposure times but I'm trying to think about how to fix that. (I don't remember having that issue before but maybe I wasn't paying attention to it) Going to probably take it somewhere and get it printed but finishing up a few other circuits that I'm doing first. Thanks, Jon |
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"Jon Slaughter" wrote in message t... "John Larkin" wrote in message ... On Thu, 18 Oct 2007 15:54:14 GMT, "Jon Slaughter" wrote: Redone to minimize area. Minor pickey: we wouldn't parallel the two surface-mount pins (lower-left on the chip) like that. It would look too much like a solder bridge. It's better to run the paralleling trace off to the left, where it's more visible and makes inspection easier. Of course, you already know that it's not a solder bridge! Maybe, I thought about it because it sorta looks odd the way I did it. I was either thinking to run them both to the source in parallel or sorta "hook" one into the other(the hook looked ust as ugly). In this case it wasn't a big deal so I just did the easiest thing ;) Although, maybe it could cause a slight issue with seating the leads? I guess I'll find out when I solder them. Still trying to figure out how to print it well. Ink jet on transparency isnt' working to well. Its about 5 to 10% transparent and very irregular. Probably fine for short exposure times but I'm trying to think about how to fix that. (I don't remember having that issue before but maybe I wasn't paying attention to it) Going to probably take it somewhere and get it printed but finishing up a few other circuits that I'm doing first. Actually I'll probably change it because its quite ugly on both sides of the pin. |
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On Fri, 19 Oct 2007 01:29:07 -0500, "Jon Slaughter"
wrote: "Jon Slaughter" wrote in message et... "John Larkin" wrote in message ... On Thu, 18 Oct 2007 15:54:14 GMT, "Jon Slaughter" wrote: Redone to minimize area. Minor pickey: we wouldn't parallel the two surface-mount pins (lower-left on the chip) like that. It would look too much like a solder bridge. It's better to run the paralleling trace off to the left, where it's more visible and makes inspection easier. Of course, you already know that it's not a solder bridge! Maybe, I thought about it because it sorta looks odd the way I did it. I was either thinking to run them both to the source in parallel or sorta "hook" one into the other(the hook looked ust as ugly). In this case it wasn't a big deal so I just did the easiest thing ;) Although, maybe it could cause a slight issue with seating the leads? I guess I'll find out when I solder them. Still trying to figure out how to print it well. Ink jet on transparency isnt' working to well. Its about 5 to 10% transparent and very irregular. Probably fine for short exposure times but I'm trying to think about how to fix that. (I don't remember having that issue before but maybe I wasn't paying attention to it) Going to probably take it somewhere and get it printed but finishing up a few other circuits that I'm doing first. Actually I'll probably change it because its quite ugly on both sides of the pin. We would hook/loop it outside the IC footprint, so the trace is clearly visible, not to mention klugable. We let our production people review our layouts for stuff like this: ease of placement, inspection clearances, fiducials, mechanics, things like that. So we can share the blame. John |
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"John Larkin" wrote in message ... On Fri, 19 Oct 2007 01:29:07 -0500, "Jon Slaughter" wrote: "Jon Slaughter" wrote in message . net... "John Larkin" wrote in message ... On Thu, 18 Oct 2007 15:54:14 GMT, "Jon Slaughter" wrote: Redone to minimize area. Minor pickey: we wouldn't parallel the two surface-mount pins (lower-left on the chip) like that. It would look too much like a solder bridge. It's better to run the paralleling trace off to the left, where it's more visible and makes inspection easier. Of course, you already know that it's not a solder bridge! Maybe, I thought about it because it sorta looks odd the way I did it. I was either thinking to run them both to the source in parallel or sorta "hook" one into the other(the hook looked ust as ugly). In this case it wasn't a big deal so I just did the easiest thing ;) Although, maybe it could cause a slight issue with seating the leads? I guess I'll find out when I solder them. Still trying to figure out how to print it well. Ink jet on transparency isnt' working to well. Its about 5 to 10% transparent and very irregular. Probably fine for short exposure times but I'm trying to think about how to fix that. (I don't remember having that issue before but maybe I wasn't paying attention to it) Going to probably take it somewhere and get it printed but finishing up a few other circuits that I'm doing first. Actually I'll probably change it because its quite ugly on both sides of the pin. We would hook/loop it outside the IC footprint, so the trace is clearly visible, not to mention klugable. We let our production people review our layouts for stuff like this: ease of placement, inspection clearances, fiducials, mechanics, things like that. So we can share the blame. Hehe, well, unfortunately I have no one to blame but myself if it goes wrong. I went ahead redid it.. I guess I can attach my final product. I'm ready to etch but just waiting for the mask to dry a bit. Hopefully I don't have any big trouble with it. BTW, the other circuits are just for "conversion" so I can work with some SMT IC's a bit easier. These circuits ended up being about 3-5 times larger than I imagined ;/ I guess that is a normal side effect of single sided stuff? Thanks, Jon |
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