"Random" Circuit Needed.
On Thu, 02 Apr 2015 09:24:29 +1000, rickman wrote:
On 4/1/2015 6:31 PM, Jim Thompson wrote:
On Thu, 02 Apr 2015 07:26:29 +1000, "David Eather"
wrote:
On Thu, 02 Apr 2015 05:14:13 +1000, Jim Thompson
wrote:
On Wed, 01 Apr 2015 15:07:54 -0400, Phil Hobbs
wrote:
On 04/01/2015 02:00 PM, Jim Thompson wrote:
For a simulation situation I need a random number generator with a
twist...
What I need to simulate is a "random" selection of one-of-16
outputs.
Clock "speed" is 12.5kHz ;-)
Built of 74HCxx parts is preferred... I have a full ensemble of
those
device in my PSpice library.
Thanks in advance.
...Jim Thompson
How random? You could use a 16-bit PRBS made from two HC299 and an
HC86. Feed back Q14 XOR Q13, and tap out four stages to a HC154
demux.
If you need better randomness, use four PRBSes of different length.
Cheers
Phil Hobbs
I just need semi-random enough to test a fast AGC.
...Jim Thompson
there is a bias with the 8-bit just use the last 4 bit idea. With 255
'clocks' all states but 0000 will occur 16 times while 0000 will only
appear 15 - the cycle then repeats. The lack of the extra 0000 may
cause
the bias point to continually drift high.
I was wondering about that myself... I'll see if there's a cure.
Do a search on the Xilinx web site for app notes on LFSR. Peter Alfke
published one which adds a few gates to specifically inject the zero
state.... or you can just use a much larger LFSR so that the small bias
is in the noise. If you use a short sequence LFSR you may see the
artifacts in your signal anyway. Remember this is only pseudo-random.
Is 255 length sequence long enough for your needs?
longer lfsr would get my vote
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