About Us

Jim Thompson[_3_]

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Nico Coesel

Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------

Phil Hobbs

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors, HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly nonlinear,
all in different ways, which makes it really hard to build a good PLL.
What's worse, their oscillators quit when their control voltages are
within a volt or so of ground (the actual threshold for misbehaviour
varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending the
dough on a better oscillator, and using the back end of a normal HC4046
from a good vendor.

Cheers

Phil Hobs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

Jim Thompson[_3_]

On Tue, 16 Oct 2012 01:16:34 GMT, (Nico Coesel)
wrote:

Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

Funny. I have a HC7046 schematic right here in front of me.

Personally I think lock detectors are a farce. But I can certainly
add it in.

As for "design tools for calculating the loop filter components", come
on Nico, that's math, you don't need a "tool" :-)

See...

http://www.analog-innovations.com/SE...opAnalysis.pdf

for a primer. Adjust analysis for edge-detecting PFD "gain".

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Jim Thompson[_3_]

On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors, HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly nonlinear,
all in different ways, which makes it really hard to build a good PLL.
What's worse, their oscillators quit when their control voltages are
within a volt or so of ground (the actual threshold for misbehaviour
varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending the
dough on a better oscillator, and using the back end of a normal HC4046
from a good vendor.

Cheers

Phil Hobs

Phil, What sort of non-linearity are you seeing? All I can think of
is perhaps using non-cascoded current mirrors, or just using a gross
un-boosted follower. Is it just a bow in the control curve, or are
you seeing bow in the capacitor charging voltage?

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Jim Thompson[_3_]

On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors, HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly nonlinear,
all in different ways, which makes it really hard to build a good PLL.
What's worse, their oscillators quit when their control voltages are
within a volt or so of ground (the actual threshold for misbehaviour
varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending the
dough on a better oscillator, and using the back end of a normal HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Jim Thompson[_3_]

On Mon, 15 Oct 2012 18:40:41 -0700, Jim Thompson
wrote:

On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim Thompson
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors, HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly nonlinear,
all in different ways, which makes it really hard to build a good PLL.
What's worse, their oscillators quit when their control voltages are
within a volt or so of ground (the actual threshold for misbehaviour
varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending the
dough on a better oscillator, and using the back end of a normal HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

Further recollections... I've used OpAmps to force the control
linearity. Been a long time, maybe 30 years since I had a VCM need.

You could, of course, resurrect one of my MC4024's from the mid '60's
:-)

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Phil Hobbs

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1, and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

Which did you pick?

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Phil Hobbs

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors, HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly nonlinear,
all in different ways, which makes it really hard to build a good PLL.
What's worse, their oscillators quit when their control voltages are
within a volt or so of ground (the actual threshold for misbehaviour
varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending the
dough on a better oscillator, and using the back end of a normal HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Tim Wescott[_4_]

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to build
a good PLL. What's worse, their oscillators quit when their control
voltages are within a volt or so of ground (the actual threshold for
misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would save
ever so much board space.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

Jim Thompson[_3_]

On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Jim Thompson[_3_]

On Tue, 16 Oct 2012 10:54:01 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to build
a good PLL. What's worse, their oscillators quit when their control
voltages are within a volt or so of ground (the actual threshold for
misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would save
ever so much board space.

W/O the charge pump, it's just a dual-D plus a quad 2-in-NAND.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Tim Wescott[_4_]

On Tue, 16 Oct 2012 08:59:19 -0700, Jim Thompson wrote:

On Tue, 16 Oct 2012 10:54:01 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This
is what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format.
Once you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there
are no design tools for calculating the loop filter components. So
how about modeling the HC7046? It is much more interesting because
of the lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to
build a good PLL. What's worse, their oscillators quit when their
control voltages are within a volt or so of ground (the actual
threshold for misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the
vendor, and that messes up the loop dynamics really badly. Spicing
the HC4046 oscillator will definitely be "a trap for young players",
as Dave Jones says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to
avoid loop instability. If you're using lead-lag compensation, you
have to put the zero a factor of at least 5 below the nominal unity
gain cross, whereas with a well-behaved VCO, you can put it right at
the unity gain cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would
save ever so much board space.

W/O the charge pump, it's just a dual-D plus a quad 2-in-NAND.

...Jim Thompson

That's a lot more board space than a SOT-23.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

Jim Thompson[_3_]

On Tue, 16 Oct 2012 11:37:30 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 08:59:19 -0700, Jim Thompson wrote:

On Tue, 16 Oct 2012 10:54:01 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This
is what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format.
Once you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there
are no design tools for calculating the loop filter components. So
how about modeling the HC7046? It is much more interesting because
of the lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to
build a good PLL. What's worse, their oscillators quit when their
control voltages are within a volt or so of ground (the actual
threshold for misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the
vendor, and that messes up the loop dynamics really badly. Spicing
the HC4046 oscillator will definitely be "a trap for young players",
as Dave Jones says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to
avoid loop instability. If you're using lead-lag compensation, you
have to put the zero a factor of at least 5 below the nominal unity
gain cross, whereas with a well-behaved VCO, you can put it right at
the unity gain cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would
save ever so much board space.

W/O the charge pump, it's just a dual-D plus a quad 2-in-NAND.

...Jim Thompson

That's a lot more board space than a SOT-23.

If you can round up some customers who would pay for it, I'll design
and fab it.

Unfortunately today's average customer wants the whole world on that
one chip, NOT just a building block.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Phil Hobbs

On 10/16/2012 11:54 AM, Tim Wescott wrote:
On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to build
a good PLL. What's worse, their oscillators quit when their control
voltages are within a volt or so of ground (the actual threshold for
misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

Operational transconductance amplifier, e.g. an LM13700--basically a
bunch of current mirrors, controlled by a diff pair so that you can set
the tail current of the pair and the output is a current source equal to
delta I_C, which pulls almost to the rails. You hang a cap on the
output, buffer it with the built-in Darlington, and feed that into a
Schmitt trigger, which can be made from the other half of the LM13700 in
a pinch. The Schmitt switches the diff pair of the integrator stage, so
you get a reasonably decent triangle wave with a slope proportional to
the current you program the OTA integrator with. Works well at low
speed, over a wide range, and the component count is lowish.

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would save
ever so much board space.

Agreed. But it would cost a bunch more, because the 4046 is the jellybean.

Cheers

Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Phil Hobbs

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Jim Thompson[_3_]

On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues :-|

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Nico Coesel

Phil Hobbs wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1, and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

Major deja-vu here :-) I used NXP's MS-DOS tool to cook up some values
but they where way off. Fortunately the circuit I tried the HC7046 in
is a one-off and not something that needs to go into production. I
have used PLLs before but never had so much trouble getting the
circuit going.

--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
--------------------------------------------------------------

Phil Hobbs

On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the
edges is hard even in a narrowband application. You just have to use
really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

tm

"Phil Hobbs" wrote in message
m...
On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the edges is
hard even in a narrowband application. You just have to use really tame
loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

You are supposed to pick up the turd by its clean end.

tm

Phil Hobbs

On 10/16/2012 04:50 PM, tm wrote:

"Phil Hobbs" wrote in message
m...
On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good
reason. Since the frequency vs RC spec is so loose, keeping away from
the edges is hard even in a narrowband application. You just have to
use really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

You are supposed to pick up the turd by its clean end.

tm

*satori*

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

John Larkin

On Tue, 16 Oct 2012 10:54:01 -0500, Tim Wescott
wrote:

On Tue, 16 Oct 2012 11:45:09 -0400, Phil Hobbs wrote:

On 10/15/2012 09:40 PM, Jim Thompson wrote:
On Mon, 15 Oct 2012 21:22:04 -0400, Phil Hobbs
wrote:

On 10/15/2012 9:16 PM, Nico Coesel wrote:
Jim
wrote:

Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

Funny. I put a HC7046 into a design recently. Unfortunately there are
no design tools for calculating the loop filter components. So how
about modeling the HC7046? It is much more interesting because of the
lock detect output which can be used as a reset.

I investigated all the HC versions (HC4046 from several vendors,
HC7046,
HC9046) about a year back, iirc, and their oscillators are all junk
compared with the ancient metal-gate 4046. They're horribly
nonlinear, all in different ways, which makes it really hard to build
a good PLL. What's worse, their oscillators quit when their control
voltages are within a volt or so of ground (the actual threshold for
misbehaviour varies from device to device).

The 7046 is enough more expensive that I'd be much happier spending
the dough on a better oscillator, and using the back end of a normal
HC4046
from a good vendor.

Cheers

Phil Hobs

It occurs to me that the variable current input quits at about 1*VTH.
So you were trying to get to zero frequency ?:-)

Add some offset current and it won't quit oscillating.

...Jim Thompson

The metal gate version works over about 1000:1 range, and is very
respectably linear--a few percent IIRC, which is much better than good
enough for inside a PLL. It's really quite pretty in a small way.

The HC parts' nonlinearity is all over the map depending on the vendor,
and that messes up the loop dynamics really badly. Spicing the HC4046
oscillator will definitely be "a trap for young players", as Dave Jones
says.

With the loop gain varying 3:1 with control voltage, and the centre
frequency being a very poorly controlled function of the RC, you have
to make HC4046 loops ridiculously overdamped in the normal case to avoid
loop instability. If you're using lead-lag compensation, you have to
put the zero a factor of at least 5 below the nominal unity gain cross,
whereas with a well-behaved VCO, you can put it right at the unity gain
cross and have 45 degrees' phase margin.

I'd far rather use an OTA integrator/Schmitt trigger oscillator or
something like that, with the 4046 PDII.

The HC4046 has its uses, but not nearly as many as if it were really a
faster CD4046.

Cheers

Phil Hobbs

Oh, I should know -- OTA Integrator?

I wish someone would take the 3-state phase detector from the 4046 and
put it into a 6-pin SOT and call it TinyLogic or whatever. It would save
ever so much board space.

We build something like the charge-pump detector into FPGAs. We use an
external dual schottky diode for the pump-up and pump-down blips, to
avoid the deadband that tri-state charge pumps tend to create. We can
also delta-sigma those outputs to control our VXCO open-loop.

The little function generator chips make nice wide-range, low
frequency VCOs. Exar, Maxim?

--

John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com

Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators

Jim Thompson[_3_]

On Tue, 16 Oct 2012 16:19:44 -0400, Phil Hobbs
wrote:

On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the
edges is hard even in a narrowband application. You just have to use
really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

Cheers

Phil Hobbs

Try this...

http://www.analog-innovations.com/SE...chitecture.pdf

Note the frequency, ~46MHz, and the current consumption ;-)

It is immaculately linear in frequency versus control current.

Now I'm yanking your chain just a wee bit, this is on a 0.18um
process, but I'll try it on a 5V process and see how it behaves.

But would anyone buy it?

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Phil Hobbs

Jim Thompson wrote:

On Tue, 16 Oct 2012 16:19:44 -0400, Phil Hobbs
wrote:

On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies like
3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle is
something you have to live with if you like 4046's. I'm doing this
for fun (and requests from this group)... I wouldn't use one myself.
Get my MC4024 if you want better linearity. I think there's also a
PECL copy, but I don't remember the part number off the top of my
head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming sort
of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046, HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of the
dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its brethren
so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the
edges is hard even in a narrowband application. You just have to use
really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

Cheers

Phil Hobbs

Try this...

http://www.analog-innovations.com/SE...chitecture.pdf

Note the frequency, ~46MHz, and the current consumption ;-)

It is immaculately linear in frequency versus control current.

Now I'm yanking your chain just a wee bit, this is on a 0.18um
process, but I'll try it on a 5V process and see how it behaves.

But would anyone buy it?

As long as it was less than a buck or thereabouts, probably so. Of
course the much-maligned Younger Generation might not understand.

Cheers

Phil Hobbs

Allan Herriman

On Wed, 17 Oct 2012 15:57:57 -0700, Jim Thompson wrote:

On Tue, 16 Oct 2012 16:19:44 -0400, Phil Hobbs
wrote:

On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This
is what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format.
Once you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like 3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle
is something you have to live with if you like 4046's. I'm doing
this for fun (and requests from this group)... I wouldn't use one
myself. Get my MC4024 if you want better linearity. I think there's
also a PECL copy, but I don't remember the part number off the top
of my head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming
sort of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of
the dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its
brethren so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the
edges is hard even in a narrowband application. You just have to use
really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

Cheers

Phil Hobbs

Try this...

http://www.analog-innovations.com/SE...chitecture.pdf

Note the frequency, ~46MHz, and the current consumption ;-)

It is immaculately linear in frequency versus control current.

Now I'm yanking your chain just a wee bit, this is on a 0.18um process,
but I'll try it on a 5V process and see how it behaves.

But would anyone buy it?

I would have bought it up to about seven years ago. That was the last
time I used a '46 (actually a '9046 with its better phase detector).
I left the oscillator disabled.

These days, for the sorts of things I design, I'm more likely to replace
the entire application with something like this:
http://www.silabs.com/products/clock...ltipliers.aspx

Regards,
Allan

Tom Del Rosso[_4_]

Phil Hobbs wrote:
On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like 3:1, and the oscillator quits below about 0.7-1.1V (@VDD=5)
depending on the device.

Which did you pick?

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046, HC9046, all makers, all horrible. PD2 is nice if you stay
out of the dead zone.)

I always wondered what the "phase pulses" were good for. If you don't need
them, my 8-gate wonder* would do, and I don't think it has a dead zone.

*
SET -----+------------------------|
| |NAND--+
+-------| +--| |
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+ |
+-------| +--| Q
| |NAND--+-------
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+----
+-------| +--|
|NAND--+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+--+ |
+-------| +--| |
| |NAND--+
RESET -----+------------------------|

--

Reply in group, but if emailing add one more
zero, and remove the last word.

Jim Thompson[_3_]

On Thu, 18 Oct 2012 11:21:12 -0400, "Tom Del Rosso"
wrote:

Phil Hobbs wrote:
On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like 3:1, and the oscillator quits below about 0.7-1.1V (@VDD=5)
depending on the device.

Which did you pick?

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046, HC9046, all makers, all horrible. PD2 is nice if you stay
out of the dead zone.)

I always wondered what the "phase pulses" were good for. If you don't need
them, my 8-gate wonder* would do, and I don't think it has a dead zone.

*
SET -----+------------------------|
| |NAND--+
+-------| +--| |
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+ |
+-------| +--| Q
| |NAND--+-------
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+----
+-------| +--|
|NAND--+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+--+ |
+-------| +--| |
| |NAND--+
RESET -----+------------------------|

Taking note that I'm not a logic designer, I'm not sure your version
covers all states. It took Ron Treadway NINE gates back in the
mid-60's in the MC4044...

http://www.analog-innovations.com/SED/MC4044_MC4344.pdf

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Phil Hobbs

On 10/18/2012 07:06 AM, Allan Herriman wrote:
On Wed, 17 Oct 2012 15:57:57 -0700, Jim Thompson wrote:

On Tue, 16 Oct 2012 16:19:44 -0400, Phil Hobbs
wrote:

On 10/16/2012 02:30 PM, Jim Thompson wrote:
On Tue, 16 Oct 2012 14:02:39 -0400, Phil Hobbs
wrote:

On 10/16/2012 11:56 AM, Jim Thompson wrote:
On Tue, 16 Oct 2012 11:25:52 -0400, Phil Hobbs
wrote:

On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This
is what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format.
Once you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like 3:1,

I don't think most users fret over the incremental slope. The
"follower" variation is trivial to fix by adding an OpAmp. Sinking
one end of the capacitor into the substrate diode every half cycle
is something you have to live with if you like 4046's. I'm doing
this for fun (and requests from this group)... I wouldn't use one
myself. Get my MC4024 if you want better linearity. I think there's
also a PECL copy, but I don't remember the part number off the top
of my head. Or use a V-to-F chip.

and the oscillator quits below about 0.7-1.1V (@VDD=5) depending on
the device.

That's noted on the data sheet. Why does that give you such
heartburn? Do you really need zero frequency?

Which did you pick?

I have the most complete data on the TI 'HC4046, but I was aiming
sort of average ;-) since I'm building it from behavioral blocks.

I would guess that you're one of the few people in the world that
would need a flat-ass accurate fit to one particular version.

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046,
HC9046, all makers, all horrible. PD2 is nice if you stay out of
the dead zone.)

Cheers

Phil Hobbs

What do you really need? An accurate V-to-F?

...Jim Thompson

The loop gain is proportional to K_VCO * K_phi, so if the tuning
sensitivity varies all over the map like that, so does the frequency
compensation of the loop. That's what makes the HC4046 and its
brethren so sucky.

Cheers

Phil Hobbs

I've not even played with one, except to measure some DC. The data
sheets would seem to indicate that the non-linearity occurs at the
tuning extremes. Just bound your control voltage if you're getting
lock-in issues:-|

Just what I need, another opportunity for a little turd-polishing.

The HC4046 isn't impossible to use, it's just sucky for no good reason.
Since the frequency vs RC spec is so loose, keeping away from the
edges is hard even in a narrowband application. You just have to use
really tame loop compensation (which is fine for some things).

I don't know why the "designers" of the 4046 didn't do a better job of
copying the PECL core of my MC4024 (~1965). All current mode, no
diode clamping, etc.

Or even the metal gate CD4046.

Cheers

Phil Hobbs

Try this...

http://www.analog-innovations.com/SE...chitecture.pdf

Note the frequency, ~46MHz, and the current consumption ;-)

It is immaculately linear in frequency versus control current.

Now I'm yanking your chain just a wee bit, this is on a 0.18um process,
but I'll try it on a 5V process and see how it behaves.

But would anyone buy it?

I would have bought it up to about seven years ago. That was the last
time I used a '46 (actually a '9046 with its better phase detector).
I left the oscillator disabled.

These days, for the sorts of things I design, I'm more likely to replace
the entire application with something like this:
http://www.silabs.com/products/clock...ltipliers.aspx

Regards,
Allan

Wow, $35? I can buy a lot of good analogue stuff for that!

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Phil Hobbs

On 10/18/2012 11:21 AM, Tom Del Rosso wrote:
Phil Hobbs wrote:
On 10/15/2012 07:59 PM, Jim Thompson wrote:
Finally zeroing in on modeling the 74HC4046 after finding a
unpublished AppNote that gave more details on the innards. This is
what a fixed frequency looks like, simulation-wise...

http://www.analog-innovations.com/SE..._VCO_2_SIM.pdf

Comments? Scalings? (This is based on AppNote and Datasheets
claiming trip at VDD/2).

First release will be VCO only and will be in LTspice format. Once
you approve that, the PFD is virtually all logic.

...Jim Thompson

Different manufacturers give you a wide variety of ridiculously
nonlinear tuning curves for the VCO--the tuning sensitivity varies
like 3:1, and the oscillator quits below about 0.7-1.1V (@VDD=5)
depending on the device.

Which did you pick?

(The metal gate 4046-style oscillators all stink on ice--HC4046,
HC7046, HC9046, all makers, all horrible. PD2 is nice if you stay
out of the dead zone.)

I always wondered what the "phase pulses" were good for. If you don't need
them, my 8-gate wonder* would do, and I don't think it has a dead zone.

*
SET -----+------------------------|
| |NAND--+
+-------| +--| |
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+ |
+-------| +--| Q
| |NAND--+-------
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+----
+-------| +--|
|NAND--+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| | |
|NAND-----+--+ |
+-------| +--| |
| |NAND--+
RESET -----+------------------------|

The phase pulse output is for lock detection. PD2's output is valid in
any condition, and when using PD2, PD1 will have a 50% duty cycle when
the loop is locked and also when one of the input signals is missing.

I normally just put a window comparator on the PD2 output and use that,
since the filtered output pulls to the rail when it's out of lock.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510

hobbs at electrooptical dot net
http://electrooptical.net

Tom Del Rosso[_4_]

Jim Thompson wrote:

Taking note that I'm not a logic designer, I'm not sure your version
covers all states.

It passed your sim with slightly different frequencies at each input to
create a walking phase shift.

You did need to match the gates. If they were simmed as discrete 7400's
then you had to take the 4 on the left from one package.

It took Ron Treadway NINE gates back in the
mid-60's in the MC4044...

http://www.analog-innovations.com/SED/MC4044_MC4344.pdf

I know. That's why I was surprised it worked with 8 as quoted:

==========quote==========
Newsgroups:
alt.binaries.schematics.electronic,sci.electronics .cad,sci.electronics.design,sci.electronics.misc
Sent: Monday, August 27, 2001 10:26 PM
Subject: Help an Analog Guy with a Digital Problem

| The internal feedback disabled the pulse too soon. The resulting
| pulse width at the final latch was about 1/2 of what it is with
| feedback from the output (~2.5nS vs 5nS).
|
|Ok. So was your testing of the last circuit sucessful under full load?
|

You bet...you're now in a product...E-Mail for details.
=========================

--

Reply in group, but if emailing add one more
zero, and remove the last word.

Jim Thompson[_3_]

On Fri, 19 Oct 2012 08:09:38 -0400, "Tom Del Rosso"
wrote:

Jim Thompson wrote:

Taking note that I'm not a logic designer, I'm not sure your version
covers all states.

It passed your sim with slightly different frequencies at each input to
create a walking phase shift.

You did need to match the gates. If they were simmed as discrete 7400's
then you had to take the 4 on the left from one package.

It took Ron Treadway NINE gates back in the
mid-60's in the MC4044...

http://www.analog-innovations.com/SED/MC4044_MC4344.pdf

I know. That's why I was surprised it worked with 8 as quoted:

==========quote==========
Newsgroups:
alt.binaries.schematics.electronic,sci.electronic s.cad,sci.electronics.design,sci.electronics.misc
Sent: Monday, August 27, 2001 10:26 PM
Subject: Help an Analog Guy with a Digital Problem

| The internal feedback disabled the pulse too soon. The resulting
| pulse width at the final latch was about 1/2 of what it is with
| feedback from the output (~2.5nS vs 5nS).
|
|Ok. So was your testing of the last circuit sucessful under full load?
|

You bet...you're now in a product...E-Mail for details.
=========================

Thanks, Tom! I'll have to try that. Does it have deadband?

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice

Tom Del Rosso[_4_]

Jim Thompson wrote:
On Fri, 19 Oct 2012 08:09:38 -0400, "Tom Del Rosso"
wrote:

Jim Thompson wrote:

Taking note that I'm not a logic designer, I'm not sure your
version covers all states.

It passed your sim with slightly different frequencies at each
input to create a walking phase shift.

You did need to match the gates. If they were simmed as discrete
7400's then you had to take the 4 on the left from one package.

It took Ron Treadway NINE gates back in the
mid-60's in the MC4044...

http://www.analog-innovations.com/SED/MC4044_MC4344.pdf

I know. That's why I was surprised it worked with 8 as quoted:

==========quote==========
Newsgroups:
alt.binaries.schematics.electronic,sci.electronics .cad,sci.electronics.design,sci.electronics.misc
Sent: Monday, August 27, 2001 10:26 PM
Subject: Help an Analog Guy with a Digital Problem

The internal feedback disabled the pulse too soon. The resulting
pulse width at the final latch was about 1/2 of what it is with
feedback from the output (~2.5nS vs 5nS).

Ok. So was your testing of the last circuit sucessful under full
load?

You bet...you're now in a product...E-Mail for details.
=========================

Thanks, Tom! I'll have to try that. Does it have deadband?

That exchange was you, me, you. You tested it and according to the email it
went into an RFID Tag Chip that reports temperature and pressure of its
environment via a 2.4GHz RF Link.

Deadband like a frequency where it doesn't work? Wouldn't there just be an
upper limit that depends on the logic speed? I can't teach you anything
about that. You'll have to teach me.

Here is the diagram with markings to show the sequence of transitions. The
=0 and =1 indicate constant states. The "x" after a number means no
further changes are caused by that transition. If you build it with NOR's
it is negative-edge triggered.

below: Q(initially) = 0 RESET = 0

/0
SET -----+------------------------|
| |NAND--+ \1
+-------| \5 +--| | /6x
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /4 | |
|NAND-----+ |
\3 +-------| +--| Q
| |NAND--+------- /2
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+---- \3
/2 +-------| +--|
|NAND--+ \3x |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND-----+--+ |
+-------| +--| |
=0 | |NAND--+ =1
RESET -----+------------------------|

below: Q(initially) = 0 RESET = 1

/0
SET -----+------------------------|
| |NAND--+ \1
+-------| \5 +--| | /6x
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| /4 | |
|NAND-----+ |
\3 +-------| +--| Q
| |NAND--+------- /2
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+---- \3
/2 +-------| +--|
|NAND--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND-----+--+ |
+-------| +--| |
=1 | |NAND--+ =1
RESET -----+------------------------|

below: Q(initially) = 1 RESET = 0

/0
SET -----+------------------------|
| |NAND--+ \1
+-------| \1 +--| | /2x
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND-----+ |
=0 +-------| +--| Q
| |NAND--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+---- =0
=1 +-------| +--|
|NAND--+ =0 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND-----+--+ |
+-------| +--| |
=0 | |NAND--+ =1
RESET -----+------------------------|

below: Q(initially) = 1 RESET = 1

/0
SET -----+------------------------|
| |NAND--+ \1
+-------| \1 +--| | /2x
|NAND--+-----+ |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =1 | |
|NAND-----+ |
=0 +-------| +--| Q
| |NAND--+------- =1
+--------------------------------+--| |
| |
+----------|--+
| |
+----------+ |
| | _
+--------------------------------+--| | Q
| |NAND-----+---- =0
=1 +-------| +--|
|NAND--+ =1 |
+--| | |
| | |
+----------|--+ |
| | |
+----------+ | |
| | |
+--| =0 | |
|NAND-----+--+ |
+-------| +--| |
=1 | |NAND--+ =1
RESET -----+------------------------|

--

Reply in group, but if emailing add one more
zero, and remove the last word.

Tom Del Rosso[_4_]

Jim Thompson wrote:

Thanks, Tom! I'll have to try that. Does it have deadband?

I didn't know what deadband refered to. Now I do, so the answer is I don't
know. I take it Treadway's 9-gate wonder did not? How can you ever know
without considering the output driver and filter characteristics?

My circuit is not 3-state, but at the time you asked for just an
edge-triggered set-reset flip flop. Since it's never hi-Z even when locked
I don't understand how it can have deadband. More jitter maybe since it
over-corrects, but not deadband. I hope you can clarify that for me.

--

Reply in group, but if emailing add one more
zero, and remove the last word.

Phil Hobbs

On 10/21/2012 9:32 PM, Tom Del Rosso wrote:
Jim Thompson wrote:

Thanks, Tom! I'll have to try that. Does it have deadband?

I didn't know what deadband refered to. Now I do, so the answer is I don't
know. I take it Treadway's 9-gate wonder did not? How can you ever know
without considering the output driver and filter characteristics?

My circuit is not 3-state, but at the time you asked for just an
edge-triggered set-reset flip flop. Since it's never hi-Z even when locked
I don't understand how it can have deadband. More jitter maybe since it
over-corrects, but not deadband. I hope you can clarify that for me.

The deadband occurs where the phase difference is small enough that the
PD2 output pulse width is less than t_PHL + t_PLH. The output pulse
becomes a runt, and the phase detector gain K_phi drops to zero at zero
phase difference.

The competing approach, used e.g. by Motorola back in the day, uses two
separate outputs and subtracts them in analogue. That still has
nonlinearity, but (a) K_phi only drops by a factor of 2 when one of the
two pulses disappears, and, even more important, (b) the loop isn't
trying to make the PD sit right on the flat spot, the way it is in the 4046.

Unlike the HC4046's VCO, PD2 is easy to fix--you just put a resistor to
ground to pull it slightly off the flat spot. A few nanoseconds' worth
is enough.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510 USA
+1 845 480 2058

hobbs at electrooptical dot net
http://electrooptical.net

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